MOS Technology 8502
The MOS Technology 8502 was an 8-bit microprocessor designed by MOS Technology and used in the Commodore 128. Based on the MOS 6510 that was used in the Commodore 64, the 8502 added the ability to run at a double (2.048 MHz) clock rate, in addition to the standard 1.024 MHz rate used by the Commodore 64.
Since the 40-column VIC-II display chip could not "steal" sufficient cycles when the CPU ran at double speed, video display in fast mode was available only with the 80-column VDC (unlike the VIC, which shares memory with the CPU, the VDC has its own dedicated video RAM in the C128). Some 40-column applications selectively disabled the screen when performing CPU-intensive calculations so that the additional speed could be utilized when the loss of video output was unimportant. A smaller speed gain, about 35%, was also possible while keeping the 40-column display active, by switching to 2 MHz only while the VIC-II is drawing the vertical screen border, since no RAM access by the VIC is needed during that time.
The pinout is a little bit different from the 6510. The 8502 has an extra I/O-pin (the built-in I/O port mapped to addresses 0 and 1 is extended from 6 to 7 bits) and lacks the ϕ2-pin that the 6510 had.
- Service Manual C-128/C128D Computer, Commodore Business Machines, PN-314001-08, November 1987
- Richard Nass: Tear Down: Scientific calculator boils design down to two ICs, Embedded.com, January 2008