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The AVR32 is a 32-bit RISC microprocessor architecture designed by Atmel. The microprocessor architecture was designed by a handful of people educated at the Norwegian University of Science and Technology, including lead designer Øyvind Strøm, PhD and CPU architect Erik Renno, M.Sc in Atmel's Norwegian design center.
Most instructions are executed single-cycle. The multiply–accumulate unit is capable of performing a 32-bit * 16-bit + 48-bit arithmetic operation in two cycles (result latency), with an issue rate of one per cycle.
Any resemblance to the 8-bit AVR is only with respect to the design center (both architectures originated out of Atmel Norway, Trondheim) and some of the debug-tools.
The AVR32 architecture consists of several micro-architectures, most notably the AVR32A and AVR32B architectures, which describe fixed additions to the instruction set architecture, configurations of the register file and the use of instruction and data-caches. The AVR32A microarchitecture is targeted at cost-sensitive applications and so does not provide dedicated hardware registers for shadowing of register file registers, status and return address in interrupt contexts. This saves chip area at the expense of slower interrupt handling. The AVR32B, on the other hand, is targeted at applications where interrupt latency is important, so it implements dedicated registers to hold these values for interrupts, exceptions and supervisor calls.
The AVR32 architecture supports a Java virtual machine hardware implementation.
The AVR32 instruction set architecture consists of 16-bit (compact) and 32-bit (extended) instructions, with several specialized instructions not found in architectures like MIPS32 or ARMv5 or ARMv6 ISA. Several U.S. patents are filed for the AVR32 ISA and design platform.
Just like the AVR 8-bit microcontroller architecture, the AVR32 was designed for extremely efficient code density and performance per clock cycle. Atmel used the independent benchmark consortium EEMBC to benchmark the architecture with various compilers and consistently outperformed both ARMv5 16-bit (THUMB) code and ARMv5 32-bit (ARM) code by as much as 50% on code-size and 3X on performance.
The AVR32 architecture is solely used in Atmel's own products. Atmel launched in 2006 the first implementation of the AVR32 architecture: the AVR32 AP7 core, a 7-stage pipelined, cache-based design platform. This "AP7000" implementation of the AVR32B architecture supports SIMD (single instruction multiple data) DSP (digital signal processing) instructions to the RISC instruction-set, in addition to Java hardware acceleration. It includes a Memory Management Unit (MMU) and supports operating systems like Linux. In early 2009, the rumored AP7200 follow-on processor was held back, with resources going into other chips.
In 2007, Atmel launched the second implementation of the AVR32 architecture: the AVR32 UC3 core. This is designed for microcontroller usage, using on-chip flash memory for program storage and running without an MMU. The AVR32 UC3 core uses a three-stage pipelined Harvard architecture specially designed to optimize instruction fetches from on-chip flash memory. The AVR32 UC3 core implements the AVR32A architecture. It shares the same instruction set architecture (ISA) as its AP7 sibling, but differs by not including the optional SIMD instructions or Java support. Still, it shares over 220 instructions. The ISA features atomic bit manipulation to control on-chip peripherals and general purpose I/Os and fixed point DSP arithmetic.
Both implementations build on a set of peripheral controllers and bus designs first seen in the AT91SAM ARM-based platforms. Some peripherals first seen in the AP7000, such as the high speed USB peripheral controller, and standalone DMA controller, appeared later in updated ARM9 platforms and then in the ARM Cortex-M3 based products.
On April 10, 2012 Atmel announced the End of Life of AP7 Core devices on 4/4/2013.
- UC3A0/1 Series - devices deliver 91 Dhrystone MIPS (DMIPS) at 66 MHz (1 flash wait-state) and consume 40 mA @66 MHz at 3.3V.
- UC3A3/4 Series - devices deliver 91 Dhrystone MIPS (DMIPS) at 66 MHz and consume 40 mA @66 MHz at 3.3V.
- UC3B0/1 Series - deliver 72 Dhrystone MIPS (DMIPS) at 60 MHz and consume 23 mA @66 MHz at 3.3V.
- UC3C0/1/2 Series - devices deliver 91 Dhrystone MIPS (DMIPS) at 66 MHz and consume 40 mA @66 MHz at 3.3V.
- UC3L Series - deliver 64 Dhrystone MIPS (DMIPS) at 50 MHz and consume 15 mA @50 MHz at 1.8V.
- AT32AP7000 development environment (STK1000)
- AT32AP7000 Network Gateway Kit (NGW100)
- AT32AP7000 board with FPGA, video decoder and Power over Ethernet (Hammerhead)
- AT32AP7000 Indefia Embedded Linux Board with ZigBee support
- All AT32UC3 Series Generic Evaluation platform (STK600)
- AT32UC3A0/1 Series Evaluation Kit (EVK1100)
- AT32UC3A0/1 Series Audio Evaluation Kit (EVK1105)
- AT32UC3A3 Series Evaluation Kit (EVK1104)
- AT32UC3B Series Evaluation Kit (EVK1101)
- AT32UC3B Breadboard module (Copper)
- AT32UC3A1 Breakout/Small Development board (Aery32)
- "AVR32 Architecture Document". Atmel. Retrieved 2008-06-15.
- "AVR32 AP Technical Reference Manual". Atmel. Archived from the original on 3 December 2008. Retrieved 2008-12-12.
- Atmel press release: "Atmel Introduces AVR32 Microcontroller which Lowers Industry's Best Power Consumption by 63%; picoPower AVR32 AT32UC3L Microcontroller offers less than 0.48 mW/MHz Active and below 100 nA Sleep Mode"
- "AVR32UC Technical Reference Manual". Atmel. Retrieved 2008-06-15.
- "Atmel Introduces First 32-bit AVR Microcontroller Featuring Floating Point Unit". Atmel. Retrieved 2011-03-26.
|Wikimedia Commons has media related to Atmel Microcontrollers.|
- Atmel AVR32
- avr32linux.org AVR32 Linux Project at the Wayback Machine (archived September 2, 2011) (now deceased) contained recent Linux kernel patches and GCC / binutils and so on.
- AVR Freaks The AVR Freaks AVR32 Forums
- FreeRTOS.org Free real time kernel for AVR32 flash micros
- OpenEmbedded supports cross-compilation for thousands of packages for the AVR32
- KaeilOS open source build-system supporting the cross compilation for the AVR32
- T2 SDE A build-system supporting the cross compilation to AVR32
- embOS for AVR32 Operating System port for AVR32
- Micrium µC/OS-II Operating System port for AVR32
- ThreadX RTOS for AVR32
- Debian AVR32 port
- eHalOS eHalOS is a small open source AVR32 multiprocessing OS
- uTasker project for the AVR32 UC3A with AVR32 simulator - free for non-commercial use and fully supported