||It has been suggested that SOPC Builder be merged into this article. (Discuss) Proposed since April 2013.|
- An implementation of VHDL and Verilog for hardware description.
- Visual edition of logic circuits.
- Vector waveform simulation.
Quartus II is a software tool produced by Altera for analysis and synthesis of HDL designs, which enables the developer to compile their designs, perform timing analysis, examine RTL diagrams, simulate a design's reaction to different stimuli, and configure the target device with the programmer. The latest version is 14.
Quartus II Web Edition
The Web Edition is a free version of Quartus II that can be downloaded or delivered by mail for free. This edition provided compilation and programming for a limited number of Altera devices.
The low-cost Cyclone family of FPGAs is fully supported by this edition, as well as the MAX family of CPLDs, meaning small developers and educational institutions have no overheads from the cost of development software.
License registration is required to use the Web Edition of Quartus II, which is free and can be renewed an unlimited number of times.
Quartus II Subscription Edition
Quartus II Subscription Edition is also available for free download, but a DRMed license must be paid for to use the full functionality in the software. The free Web Edition license can be used on this software, restricting the devices that can be used.
The supported operating systems are:
- Microsoft Windows Vista (32-bit and 64-bit)
- Microsoft Windows XP (32-bit and 64-bit)
- Microsoft Windows 2000
- Solaris 8 and 9 (32-bit and 64-bit)
- SUSE Linux Enterprise 9 (32-bit and 64-bit)
- Red Hat Enterprise Linux 5 (32-bit and 64-bit)
- Red Hat Enterprise Linux 4 (32-bit and 64-bit)
- Red Hat Enterprise Linux 3 (32-bit and 64-bit)
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