Brent–Kung adder

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In electronics, an adder is a combinatorial or sequential logic element which computes the (n+1)-bit sum of two n-bit numbers. The Brent–Kung adder proposed in 1982 [1] is one of the most advanced designs, having a gate level depth of O(log_2(n)).

The Brent–Kung adder is a parallel prefix form carry look-ahead adder. It takes less area to implement than the Kogge-Stone adder and has less wiring congestion, but lower performance.

References[edit]

  1. ^ Brent, R. P. & Kung, H. T. "A Regular Layout for Parallel Adders". IEEE Transactions on Computers, 1982, C-31, 260-264

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