COMPASS is an acronym for COMPrehensive ASSembler. COMPASS is any of a family of macro assembly languages on Control Data Corporation's 3000 series, and on the 60-bit CDC 6000 series, 7600 and Cyber 70 and 170 series mainframe computers. While the architectures are very different, the macro and conditional assembly facilities are similar.
COMPASS for 24-bit machines
COMPASS for 48-bit machines
COMPASS for 60-bit machines
There are two flavors of COMPASS on the 60-bit machines:
- COMPASS CP is the assembly language for the CP (Central Processor), the processor running user programs. See CDC 6600 CP architecture.
- COMPASS PP is the assembly language for the PP (Peripheral Processor), only running operating system code. See CDC 6600 PP architecture.
COMPASS is a classical two-pass assembler with macro and conditional assembly features, and generates a full listing showing both the source assembly code and the generated machine code (in octal). CDC's operating systems were written almost entirely in COMPASS assembly language.
Central processor (CP or CPU) hardware maintains 24 operational registers, named A0 to A7, X0 to X7 and B0 to B7. Registers X0 to X7 are 60 bits long and are used to hold data, while registers B0 to B7 are 18 bits long and their major purpose is to hold either addresses or be used as indexing registers, except that B0 is always zero. As a programming convention, B1 (or B7) often contains positive 1.
A or address registers are also 18 bits long. Each A register pairs with the corresponding X register. Whenever an address is set into any of A1 to A5 registers, the data at that memory location (address) is transferred into the corresponding X register. Likewise, setting an address into one of A6 or A7 registers stores the data held in the corresponding X6 or X7 register to that memory location. However, A0 can be used to hold any address without affecting the contents of register X0.
CP instructions are written in a particularly user-friendly form: "SA1 A0+B1" denotes set address register A1 to the sum of address register A0 and index register B1. The hardware then initiates a memory load from the computed address into register X1.
Peripheral processor (PP or PPU) instructions are completely different from CPU instructions. Peripheral processor hardware is simpler; it has an 18-bit A (accumulator register, a 12-bit Program Address register, a 12-bit Q register (not programmer-visible), and a 22-bit R register (used to accomplish address relocation during central memory read and write instructions on Cyber 180 systems). No special job validation was required to assemble peripheral processor programs, but to be executed, such programs were required to installed into the operating system via special system editing commands.