C to HDL

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C to HDL tools convert C or C-like computer program code into a hardware description language (HDL) such as VHDL or Verilog. The converted code can then be synthesized and translated into a hardware device such as a field-programmable gate array. The motivation for this is that writing in a hardware description language can be tedious and time consuming.

C to RTL is another name for this methodology. RTL refers to the register transfer level representation of a program necessary to implement it in logic.

History[edit]

Early development on C to HDL was done by Ian Page, Charles Sweeney and colleagues at Oxford University in the 1990s who developed the Handel-C language. They commercialized their research by forming Embedded Solutions Limited (ESL) in 1999 which was renamed Celoxica in September 2000. In 2008, the embedded systems departments of Celoxica was sold to Catalytic for $3 million and which later merged to become Agility Computing. In January 2009, Mentor Graphics acquired Agility's C synthesis assets.[1] Celoxica continues to trade concentrating on hardware acceleration in the financial and other industries.[2]

Applications[edit]

C to HDL techniques are most commonly applied to applications that have unacceptably high execution times on existing general-purpose supercomputer architectures. Examples include Bioinformatics, Computational fluid dynamics (CFD),[clarification needed] financial processing, and oil and gas survey data analysis. Embedded applications requiring high performance or real-time data processing are also an area of use. System-on-a-chip design may also take advantage of C to HDL techniques.

C-to-VHDL compilers are very useful for large designs or for implementing code that might change in the future. Designing a large application entirely in HDL may be very difficult and time-consuming; the abstraction of a high level language for such a large application will often reduce total development time. Furthermore, an application coded in HDL will almost certainly be more difficult to modify than one coded in a higher level language. If the designer needs to add new functionality to the application, adding a few lines of C code will almost always be easier than remodelling the equivalent HDL code.

Flow to HDL tools have a similar aim, but with flow rather than C-based design.

Example tools[edit]

See also[edit]

References[edit]

  1. ^ Dylan McGrath (Published 01/22/2009). "Mentor buys Agility's C synthesis assets". EETimes.com.  Check date values in: |date= (help)
  2. ^ Celoxica Ltd (Published 01/22/2011). "Celoxica Ltd 'About Us'". Celoxica.com.  Check date values in: |date= (help)
  3. ^ http://www.myhdl.org/

External links[edit]

  • [2] a good article on Dr Dobbs Journal about ImpulseC.
  • [3] an overview of flows by Daresbury Labs.
  • [4] an Overview of Hardware Compilation and the Handel-C language.
  • [5] Xilinx's ESL initiative, some products listed and C to VHDL tools.
  • [6] Altium's C-to-Hardware Compiler overview.
  • [7] Altera's Nios II C2H Acceleration Compiler White Paper.