Camera Link
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Camera Link is a serial communication protocol designed for computer vision applications based on the National Semiconductor interface Channel-link. It was designed for the purpose of standardizing scientific and industrial video products including cameras, cables and frame grabbers. The standard is maintained and administered by the Automated Imaging Association or AIA, the global machine vision industry's trade group.
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[edit] Transmission protocol
The base Camera Link standard uses 28 bits to represent up to 24 bits of pixel data and 3 bits for Video Sync signals. These consist of Data Valid, Frame Valid, and Line Valid bits. The data are serialized 7:1, and the four data streams and a dedicated clock are driven over five LVDS pairs. The receiver accepts the four LVDS data streams and LVDS clock, and then drives the 28 bits and a clock to the board. The camera link standard calls for these 28 bits to be transmitted over 4 serialized differential pairs with a serialization factor of 7. The parallel data clock is transmitted with the data. Typically a 7x clock must be generated by a PLL or SERDES block in order to transmit or receive the serialized video. To deserialize the data, a shift register and counter may be employed. The shift register catches each of the serialized bits, one at a time, then registers the data out into the parallel clock domain - once the data counter has reached its terminal value.
[edit] Base configuration
The "Base" Camera Link configuration carries signals over a single connector/cable. The cable used is a MDR ("Mini D Ribbon") 26-pin Male Plug Connector, optimized by 3M for the LVDS signal. In addition to the 5 LVDS pairs transmitting the serialized video data (24 bits of data and 4 framing/enable signals), the connector also carries 4 LVDS discrete control signals and 2 LVDS asynchronous serial communication channels for communicating with the camera. At the maximum chipset operating frequency (85 MHz), the base configuration yields a video data throughput of 2.04 Gbit/s (255 MB/s).
[edit] Medium/Full configuration
The Camera Link specification includes higher-bandwidth configurations that provide additional video data paths over a second connector/cable. The "Medium" configuration doubles the video bandwidth, adding an additional 24 bits of data and the same 4 framing/enable signals present in the "Base" configuration. This yields a 48-bit wide video data path capable of throughput up to 4.08 Gbit/s (510 MB/s). The "Full" configuration adds another 16-bits to the data path, resulting in a 64-bit wide video path that can carry 5.44Gbit/s (680 MB/s).
[edit] Other extended configurations
Some camera and data acquisition hardware manufacturers have extended the bandwidth of the interface beyond the limits imposed by the Camera Link interface specification. These formats extend the width of the "Full" configuration by reassigning some of the redundant framing/enable signals to produce a data path width of up to 80-bits over two connectors/cables, which further increases the video bandwidth. The 80-bit video path can carry 6.8 Gbit/s (850 MB/s).[1]
[edit] Signal data
[edit] Interface Standard Specifications
The Camera Link standard is maintained by AIA. The introduction of the Camera Link Interface Standard (1.0) was released in October 2000. Revision 1.1 was adopted in January 2004, with expanded software function support. The standard committee adopted version 1.2 in January 2007, introducing mini SDR ("Shrunk D Ribbon") connectors (SDR-26) and power over Camera Link (POCL). Annex D of revision 1.2 adds mechanical and electrical descriptions to the standard, especially cable performance. Annex E of revision 1.2 lists requirements of POCL equipment.
[edit] See also
[edit] Notes
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