Category:Electronic design automation

C

• [+] Electronic design automation companies (59 P)
• [+] Electronic design automation conferences (6 P)

E

• [+] Electronic circuit verification (18 P)

N

• [+] Network On Chip (2 P)

O

• [+] Electronics optimization (10 P)
• [+] Electronic design automation organizations (4 P)

P

• [+] Electronic design automation people (11 P)

S

• [+] SMT solvers (2 P)

S cont.

• [+] Electronic design automation software (4 C, 61 P)

T

• [+] Timing in electronic circuits (1 C, 6 P)

A

• And-inverter graph
• Antenna effect
• Asynchronous system

B

• Black's equation
• Boolean satisfiability problem

C

• Cell (EDA)
• Channel router
• Circuit extraction

D

• Design For Test
• Design closure
• Design flow (EDA)
• Design for manufacturability (IC)
• Digital electronics

E

• EDA database
• EDIF
• Electromagnetic field solver
• Electromigration
• Electronic design automation
• Electronic system level
• Elmore delay

F

• Fault coverage
• Floorplan (microelectronics)
• Floorplanning

G

• GDSII
• Generic array logic
• Graphical system design

H

• HLV
• High-level synthesis

I

• IC layout editor

L

• Ladder logic
• Logic optimization
• Logic simulation
• Logic synthesis

M

• Mask data preparation
• Multi-project wafer service

N

• Netlist
• Network On Chip
• Noise margin

P

• Place and route
• Placement (EDA)
• Platform-based design
• Potential applications of carbon nanotubes
• Power network design (IC)
• Power optimization (EDA)
• Programmable Array Logic
• Programmable system device

P cont.

• Programmable logic array

R

• Register transfer level
• Rent's rule
• Resolution enhancement technologies

S

• Satisfiability Modulo Theories
• Schematic
• Schematic capture
• Semiconductor intellectual property core
• Semiconductor process simulation
• Signal integrity
• Signoff (electronic design automation)
• Standard cell
• State logic
• Stuck-at fault
• Substrate coupling
• Symbolic simulation
• Systems design

T

• Technology CAD
• Test compression
• Transaction-level modeling

U

• Ultra-Large-Scale Systems

V

• Value change dump