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|Chenming Calvin Hu|
|Institutions||University of California, Berkeley|
Chenming Calvin Hu is Distinguished Professor of Microelectronics at University of California, Berkeley. From 2001-2004, he was the Chief Technology Officer of TSMC, world’s largest IC foundry. IEEE, the world’s largest technical association, called him “microelectronics visionary,… whose seminal work on metal-oxide semiconductor MOS reliability and device modeling has had enormous impact on the continued scaling of electronic devices”. He is a member of the US National Academy of Engineering, the Chinese Academy of Sciences, and Academia Sinica.
One of Hu’s more famous contributions is a promising MOS field-effect transistor (MOSFET) called the FinFET (which Intel called this recently as a "3D transistor"). As the team leader, and using conventional technology, Hu co-developed a multiple-gate transistor that allows much smaller transistors to be built. Hu also contributed to the creation of the BSIM (Berkeley Short-Channel IGFET Model) series of compact models. Chosen by the industry as the first international transistor model standards, these models enable accurate circuit simulation for efficient integrated circuit design. Most major chip manufacturers have used BSIM model for IC products. A pioneer in transistor reliability modeling, Hu developed widely used CMOS device reliability models.
He received 2009 IEEE Jun-Ichi Nishizawa Medal for his technical contributions in MOSFET device reliability, scaling of CMOS and compact device modeling. He also received 2002 IEEE Solid State Circuits Award, and 1997 IEEE Jack A. Morton Award. He was honored with the 2009 Aristotle Award of Semiconductor Research Corporation (SRC) for his outstanding teaching in its broadest sense  and UC Berkeley's highest honor for teaching - the Berkeley Distinguished Teaching Award.
Professor Chenming Hu received his B.S. degree in Electrical Engineering from National Taiwan University in 1968 and his M.S. and Ph.D. degrees from EECS, University of California, Berkeley in 1970 and 1973, respectively. From 1973-1976, he was Assistant Professor at MIT. He has been Professor of Electrical Engineering and Computer Sciences, University of California, Berkeley, since 1976.
He is a board member of SanDisk  and MoSys, Inc., and the non profit Friends of Children with Special Needs of Fremont, CA. He was the chairman of nonprofit East Bay Chinese School of Oakland, California. He co-founded and was the chairman of Celestry Design Technologies Inc. from 1996-2002 until it was acquired by Cadence Design Systems.
Awards and honors 
- 2009: IEEE Jun-ichi Nishizawa Medal, "for [his] technical contributions to MOS[FET] device reliability, scaling of CMOS and compact device modeling"
- 1997: elected to the United States National Academy of Engineering
- Chinese Academy of Sciences, elected member 2007
- Academia Sinica, Taiwan, elected member 2004
- IEEE Paul Rappapart Award, 2003
- IEEE Solid-State Circuits Award (for developing the first international standard transistor model BSIM), 2002
- IEEE Jack Morton Award (for outstanding contributions to semiconductor devices and technology), 1997
- Berkeley Distinguished Teaching Award (Berkeley’s highest honor for teaching), 1997
- Sigma Xi Moni Ferst Award for promotion of research through education, 1998
- SRC Aristotle Award (for outstanding mentoring of student researchers), 2009
- Chancellor’s Professor Chair, University of California, Berkeley, 1998–2001
- TSMC Distinguished Professor Chair, Univ. of Calif., Berkeley, 2001–present
- Life Honorary Professor, Chinese Academy of Science, China, 1990–present
- Honorary Professor, National Chiao-Tung University, Taiwan, 2001–present
- IEEE Fellow, Institute of Electrical and Electronics Engineers, 1989–present
- Design News Magazine 1991 Excellence in Design Award (for pioneering IC reliability simulation software), 1991
- SRC[disambiguation needed] inaugural Research Excellence Award, 1992
- R&D100 Award (BSIM3 as one of the most significant new technologies), 1996
- BSIM selected as world’s first standard transistor simulation model for IC design, 1997
- W.Y. Pan Foundation Award (for Distinguished Research in Electronics), 1999
- DARPA Most Outstanding Technical Accomplishment Award (for FinFET), 2000
- Hu, Chenming. http://www.ieee.org/portal/cms_docs_iportals/iportals/aboutus/news/2009/nishizawa_medal_release.pdf. Missing or empty
- Hu, Chenming. http://grc.src.org/member/about/aristotle_2009.asp. Missing or empty
- Hu, Chenming. Forbes http://people.forbes.com/profile/chenming-hu/55007
|url=missing title (help).
- "IEEE Jun-ichi Nishizawa Medal". IEEE. Retrieved January 21, 2011.
- "IEEE Jun-ichi Nishizawa Medal Recipients". IEEE. Retrieved January 21, 2011.
- Mark LaPedus (June 17, 2009"Hu receives IEEE award". EETimes. Retrieved January 21, 2011.).
- "NAE Members Directory - Dr. Chenming Hu". NAE. Retrieved January 21, 2011.
- "IEEE Donald O. Pederson Award in Solid-State Circuits Recipients". IEEE. Retrieved November 15, 2010.