|Type||Digital audio/video connector|
|Superseded||Digital Visual Interface|
|Audio signal||Optional; 1–8 channels, 16 or 24-bit linear PCM; 32 to 192 KHz sampling rate; maximum bitrate 36,864 kbit/s (4.608 MB/s)|
|Video signal||Optional, maximum resolution limited by available bandwidth|
|Cable||3 meters for full bandwidth transmission over passive cable.
33 meters over active cable.
|Pins||20 pins for external connectors on desktops, notebooks, graphics cards, monitors, etc. and 30/20 pins for internal connections between graphics engines and built-in flat panels.|
|Max. voltage||16.0 V|
|Max. current||0.5 A|
|Bitrate||1.62, 2.7, 5.4, or 8.1 Gbit/s data rate per lane; 1, 2, or 4 lanes; (effective total 5.184, 8.64, 17.28, or 25.92 Gbit/s for 4-lane link); 1 Mbit/s or 720 Mbit/s for the auxiliary channel.|
|External connector (source-side) on PCB|
|Pin 1||ML_Lane 0 (p)||Lane 0 (positive)|
|Pin 3||ML_Lane 0 (n)||Lane 0 (negative)|
|Pin 4||ML_Lane 1 (p)||Lane 1 (positive)|
|Pin 6||ML_Lane 1 (n)||Lane 1 (negative)|
|Pin 7||ML_Lane 2 (p)||Lane 2 (positive)|
|Pin 9||ML_Lane 2 (n)||Lane 2 (negative)|
|Pin 10||ML_Lane 3 (p)||Lane 3 (positive)|
|Pin 12||ML_Lane 3 (n)||Lane 3 (negative)|
|Pin 13||CONFIG1||connected to Ground1)|
|Pin 14||CONFIG2||connected to Ground1)|
|Pin 15||AUX CH (p)||Auxiliary Channel (positive)|
|Pin 17||AUX CH (n)||Auxiliary Channel (negative)|
|Pin 18||Hot Plug||Hot Plug Detect|
|Pin 19||Return||Return for Power|
|Pin 20||DP_PWR||Power for connector (3.3 V 500 mA)|
|# Pins 13 and 14 may either be directly connected to ground or connected to ground through a pulldown device.
DisplayPort is a digital display interface developed by the Video Electronics Standards Association (VESA). The interface is primarily used to connect a video source to a display device such as a computer monitor, though it can also be used to carry audio, USB, and other forms of data.
- 1 Overview
- 2 Versions
- 3 Companion standards
- 4 Specifications
- 5 Advantages over DVI, VGA and FPD-Link
- 6 Market share
- 7 Products
- 8 Participating companies
- 9 See also
- 10 Notes
- 11 References
- 12 External links
DisplayPort is the first display interface to rely on packetized data transmission, a form of digital communication found in technologies including Ethernet, USB, and PCI Express. It allows both internal and external display connections and, unlike legacy standards where differential pairs are fixed to transmitting a clock signal with each output, the DisplayPort protocol is based on small data packets known as micro packets, which can embed the clock signal within the data stream, allowing higher resolutions with fewer pins. The use of data packets also allows DisplayPort to be extensible, meaning additional features can be added over time without significant changes to the physical interface itself.
DisplayPort can be used to transmit audio and video simultaneously, but each one is optional and can be transmitted without the other. The video signal path can have six to sixteen bits per color channel, and the audio path can have up to eight channels of 24-bit 192 kHz uncompressed PCM audio or can encapsulate compressed audio formats in the audio stream. A bi-directional, half-duplex auxiliary channel carries device management and device control data for the Main Link, such as VESA EDID, MCCS, and DPMS standards. In addition, the interface is capable of carrying bi-directional USB signals.
The DisplayPort signal is not compatible with DVI or HDMI. However, Dual-mode DisplayPorts are designed to transmit a single-link DVI or HDMI 1.2/1.4 protocol across the interface through the use of an external passive adapter that selects the desired signal and converts the electrical signaling from LVDS to TMDS. Analog VGA and dual-link DVI require powered active adapters to convert the protocol and signal levels and do not rely on Dual-Mode. VGA adapters are powered by the DisplayPort connector, while dual-link DVI adapters may rely on an external power source (see compatibility with HDMI, DVI and VGA).
The DisplayPort connector can have one, two, or four differential data pairs (lanes) in a Main Link, each with a raw bit rate of 1.62, 2.7, 5.4, or 8.1 Gbit/s per lane with self-clock running at 162, 270, 540, or 810 MHz. The effective data rates after decoding are 1.296, 2.16, 4.32, or 6.48 Gbit/s per lane (or 80% of the total), since data is 8b/10b encoded so each eight bits of information are encoded with a ten-bit symbol.
1.0 to 1.1
DisplayPort 1.0 allows a maximum of 8.64 Gbit/s data rate over a 2-meter cable. DisplayPort 1.1 also allows devices to implement alternative link layers such as fiber optic, allowing a much longer reach between source and display without signal degradation, although alternative implementations are not standardized. It also includes HDCP in addition to DisplayPort Content Protection (DPCP).
DisplayPort version 1.2 was approved on December 22, 2009. The most significant improvement of the new version is the doubling of the effective bandwidth to 17.28 Gbit/s in High Bit Rate 2 (HBR2) mode, which allows increased resolutions, higher refresh rates, and greater color depth. Other improvements include multiple independent video streams (daisy-chain connection with multiple monitors) called Multi-Stream Transport, facilities for stereoscopic 3D, increased AUX channel bandwidth (from 1 Mbit/s to 720 Mbit/s), more color spaces including xvYCC, scRGB and Adobe RGB 1998, and Global Time Code (GTC) for sub 1 µs audio/video synchronisation. Also Apple Inc.'s Mini DisplayPort connector, which is much smaller and designed for laptop computers and other small devices, is compatible with the new standard.
DisplayPort version 1.2a may optionally include VESA's Adaptive Sync. AMD's FreeSync makes use of DisplayPort's capabilities; FreeSync was demonstrated at CES 2014 and later proposed VESA to standardize variable refresh rate features to DisplayPort standard.
DisplayPort version 1.3 was released on September 15, 2014. This standard increases overall transmission bandwidth to 32.4 Gbit/s with the new HBR3 mode featuring 8.1 Gbit/s per lane (up from 5.4 Gbit/s with HBR2 in version 1.2), totalling 25.92 Gbit/s with overhead removed. This bandwidth allows for 5K displays (5120×2880 px) in RGB mode, and UHD 8K television displays at 7680×4320 (16:9, 33.18 megapixels) using 4:2:0 subsampling. The bandwidth also allows for two 4K (3840×2160 px) computer monitors at 60 Hz in 24-bit RGB mode using Coordinated Video Timing, a 4K stereo 3D display, or a combination of 4K display and SuperSpeed USB 3.0 as allowed by DockPort. The new standard features HDMI 2.0 compatibility mode with HDCP 2.2 content protection. It also supports VESA Display Stream Compression, which uses a visually lossless low-latency algorithm to increase resolutions and color depths and reduce power consumption.
Mini DisplayPort (mDP) is a standard announced by Apple in the fourth quarter of 2008. Shortly after announcing the Mini DisplayPort, Apple announced that it would license the connector technology with no fee. The following year, in early 2009, VESA announced that Mini DisplayPort would be included in the upcoming DisplayPort 1.2 specification. On 24 February 2011, Apple and Intel announced Thunderbolt, a successor to Mini DisplayPort which adds support for PCI Express data connections while maintaining backwards compatibility with Mini DisplayPort based peripherals.
Micro DisplayPort will target systems that need ultra-compact connectors, such as phones, tablets and ultra-portable notebook computers. This new standard will be physically smaller than the currently available mini DisplayPort connectors. The standard is expected to be released by Q2 2014.
Direct Drive Monitor (DDM) 1.0 standard was approved in December 2008. It allows for controller-less monitors where the display panel is directly driven by the DisplayPort signal, although the available resolutions and color depth are limited to two-lane operation.
Embedded DisplayPort (eDP) 1.0 standard was adopted in December 2008. It aims to define a standardized display panel interface for internal connections; e.g., graphics cards to notebook display panels. It has advanced power-saving features including seamless refresh rate switching. Version 1.1 was approved in October 2009 followed by version 1.1a in November 2009. Version 1.2 was approved in May 2010 and includes DisplayPort 1.2 data rates, 120 Hz sequential color monitors, and a new display panel control protocol that works through the AUX channel. Version 1.3 was published in February 2011; it includes a new Panel Self-Refresh (PSR) feature developed to save system power and further extend battery life in portable PC systems. PSR mode allows GPU to enter power saving state in between frame updates by including framebuffer memory in the display panel controller. Version 1.4 is expected before end of 2012; it reduces power consumption with partial-frame updates in PSR mode, regional backlight control, lower interface voltage, and additional link rates; the auxiliary channel supports multi-touch panel data to accommodate different form factors.
Internal DisplayPort (iDP) 1.0 was approved in April 2010. The iDP standard defines an internal link between a digital TV system on a chip controller and the display panel's timing controller. It aims to replace currently used internal FPD-Link lanes with DisplayPort connection. iDP features unique physical interface and protocols, which are not directly compatible with DisplayPort and are not applicable to external connection, however they enable very high resolution and refresh rates while providing simplicity and extensibility. iDP features non-variable 2.7 GHz clock and is nominally rated at 3.24 Gbit/s data rate per lane, with up to sixteen lanes in a bank, resulting in six-fold decrease in wiring requirements over FPD-Link for a 1080p24 signal; other data rates are also possible. iDP was built with simplicity in mind and it doesn't have AUX channel, content protection, or multiple streams; however it does have frame sequential and line interleaved stereo 3D.
Portable Digital Media Interface (PDMI) is an interconnection between docking stations/display devices and portable media players, which includes 2-lane DisplayPort v1.1a connection. It has been ratified in February 2010 as ANSI/CEA-2017-A.
Wireless DisplayPort (wDP) enables DisplayPort 1.2 bandwidth and feature set for cable-free applications operating in 60 GHz radio band; it was announced on November 2010 by WiGig Alliance and VESA as a cooperative effort.
SlimPort, a brand of Analogix products, complies with Mobility DisplayPort, also known as MyDP, which is an industry standard for a mobile audio/video Interface, providing connectivity from mobile devices to external displays and HDTVs. SlimPort implements the transmission of video up to 4K-UltraHD and up to eight channels of audio over the micro-USB connector to an external converter accessory or display device. SlimPort products support seamless connectivity to DisplayPort, HDMI and VGA displays. The MyDP standard was released in June 2012, and the first product to use SlimPort was Google's Nexus 4 smartphone.
DisplayID is designed to replace the E-EDID standard. DisplayID features variable-length structures which encompass all existing EDID extensions as well as new extensions for 3D displays and embedded displays.
The latest version 1.3 (announced on 23 September 2013) adds enhanced support for tiled display topologies; it allows better identification of multiple video streams, and reports bezel size and locations. As of December 2013, many current 4K displays use a tiled topology, but lack a standard way to report to the video source which tile is left and which is right. These early 4K displays, for manufacturing reasons, typically use two 1920×2160 panels laminated together and are currently generally treated as multiple-monitor setups. DisplayID 1.3 also allows 8K display discovery, and has applications in stereo 3D, where multiple video streams are used.
DockPort, formerly known as Lightning Bolt, is an extension to DisplayPort to include USB 3.0 data as well as power for charging portable devices from attached external displays. Originally developed by AMD and Texas Instruments, it has been announced as a VESA specification in 2014.
On September 22nd, 2014, VESA published the "DisplayPort Alternate Mode on USB Type-C Connector Standard", a specification on how to send DisplayPort signals over the newly released USB Type-C connector. One, two or all four of the differential lanes can be configured dynamically as DisplayPort lanes. In the first two cases the connector still can carry a full USB 3.1 signal; in the latter case, at least a USB 2.0 signal is available. The DisplayPort AUX channel is also supported as a "secondary bus" over the same connector; furthermore, USB power delivery according to the newly expanded USB-PD 2.0 specification is possible at the same time. This makes the Type-C connector a strict superset of the use-cases envisioned for DockPort.
- Forward link channel with 1 to 4 lanes; effective data rate 1.296 (reduced bit rate), 2.16 (high bit rate), 4.32 (HBR2), or 6.48 Gbit/s (HBR3) per lane (total 5.184, 8.64, 17.28, or 25.92 Gbit/s for a 4-lane link)†.
- 8b/10b encoding provides DC-balancing and Embedded Clock within serial channel (10 bit symbols, 20% coding overhead)
- RGB (unspecified) and YCbCr (ITU-R BT.601-5 and BT.709-4) color spaces, 4:4:4, 4:2:2, or 4:2:0 chroma subsampling
- sRGB, Adobe RGB 1998, DCI-P3, RGB XR, scRGB, xvYCC, Y-only, Simple Color Profile (version 1.2)
- color depth of 6, 8, 10, 12 and 16 bits per color component
- Optional 8-channel audio with sampling rates up to 24 bit 192 kHz, encapsulation of audio compression formats
- Bidirectional half-duplex AUX channel, 1 Mbit/s (v1.0) or optional 720 Mbit/s (v1.2)
- stereoscopic 3D formats: frame sequential (v1.1a), field sequential, side-by-side, top-bottom, line interleaved, pixel interleaved and dual interface (v1.2)
- Optional dual-mode facility generates TMDS and clock for single-link DVI/HDMI signaling using a simple passive dongle for signal level conversion.
- Up to 63 video and audio streams with time-division transport multiplexing and hot-plug bandwidth allocation (from version 1.2)
- 128-bit AES DisplayPort Content Protection (DPCP), 56-bit High-bandwidth Digital Content Protection (HDCP) 1.3 from version 1.1 onwards, HDCP 2.2 (128-bit AES) from version 1.3.
- Internal and external connections so that one standard can be used by computer makers reducing costs.
|Resolution × color depth @ frame rate||CVT||CVT-R||CVT-R2||CEA-861-F|
|1280 × 720 × 24 bpp @ 60 Hz||1.79||1.54||1.45||1.78|
|1920 × 1080 × 24 bpp @ 60 Hz||4.15||3.33||3.20||3.56|
|1920 × 1200 × 30 bpp @ 60 Hz||5.81||4.62||4.45||-|
|2560 × 1440 × 24 bpp @ 60 Hz||5.80||5.63||-|
|2560 × 1600 × 30 bpp @ 60 Hz||8.06||7.82||-|
|3840 × 2160 × 24 bpp @ 30 Hz||6.18||7.13|
|3840 × 2160 × 24 bpp @ 60 Hz||12.54||14.26|
|4096 × 2304 × 30 bpp @ 60 Hz||17.81||-|
|5120 × 2880 × 24 bpp @ 60 Hz||22.18||-|
|7680 × 4320 × 24 bpp @ 30 Hz||24.82||28.51|
|7680 × 4320 × 24 bpp @ 60 Hz||49.65||57.02|
|For 24-bit RGB and YCbCr 4:4:4 encodings, bpp = 3 × bpc (bits per channel); for YCbCr 4:2:2 subsampling, bpp = 2 × bpc, for YCbCr 4:2:0, bpp=1.5 × bpc.
Multiply by 1.25, 1.5, or 2 to calculate bandwidth for 30/36/48 bit bpp, divide by 1.5 for YCbCr 4:2:2, divide by 2 for YCbCr 4:2:0.
Digital Rights Management (DRM)
DisplayPort 1.0 includes optional DPCP (DisplayPort Content Protection) from Philips, which uses 128-bit AES encryption. It also features full authentication and session key establishment (each encryption session is independent). There is an independent revocation system. This portion of the standard is licensed separately. It also adds the ability to verify the proximity of the receiver and transmitter, a technique intended to ensure users are not bypassing the content protection system to send data out to distant, unauthorized users.
DisplayPort 1.1 added optional implementation of industry-standard 56-bit HDCP (High-bandwidth Digital Content Protection) revision 1.3, which requires separate licensing from the Digital Content Protection LLC.
DisplayPort 1.3 supports HDCP 2.2, which is also employed by HDMI 2.0.
|DisplayPort pins||DVI 1.0/HDMI mode|
|Main Link Lane 0||TMDS Channel 2|
|Main Link Lane 1||TMDS Channel 1|
|Main Link Lane 2||TMDS Channel 0|
|Main Link Lane 3||TMDS Clock|
|AUX CH+||DDC Clock|
|AUX CH-||DDC Data|
|Hot Plug Detect||Hot Plug Detect|
|Config 1||Cable Adaptor Detect|
|Config 2||CEC (HDMI only)|
Dual-mode DisplayPort (also known as DisplayPort++) can directly output single-link HDMI and DVI signals using a simple passive adapter that adjusts from the different connector and the lower voltages used by DisplayPort. When a dual-mode chipset detects that a DVI or HDMI passive adapter is attached, it switches to DVI/HDMI mode which uses the 4-lane main DisplayPort link and the AUX channel link to transmit three TMDS signals, a clock signal and Display Data Channel data/clock. Dual-mode ports are marked with the DP++ logo; most current DisplayPort graphics cards and monitors offer this mode.
In January 2013, a new VESA specification was released called DisplayPort Dual-Mode Standard version 1.1, which brings dual-mode capabilities on par with HDMI 1.4, allowing a TDMS clock rate of up to 300 MHz, 1080p deep color, 4K resolution, and stereoscopic 3D formats. Passive adapters and ports which support the new data rate will be marked "Type 2" and will be backwards compatible with existing "Type 1" ports.
A notable limitation of Type 1 dual-mode is that it can only transmit single-link DVI (and HDMI), as the number of pins in the DisplayPort connector is insufficient for dual-link connections. Also, it is limited to a TMDS clock rate of 165 MHz. As a result, an active converter is needed for Dual-Link DVI, HDMI 1.3+, and analog component video such as VGA. Some of these active adapters can rely on the +3.3 V wire in the DisplayPort connector for the conversion, but other types of active conversion, such as Dual-Link DVI, require external power that is often pulled from an available USB port.
In September 2014, DisplayPort 1.3 specification was released, which updates dual-mode support to HDMI 2.0 allowing 14.4 Gbit/s of bandwidth and 600 MHz pixel clock.
VESA anticipates that HDMI and DVI conversion will eventually be handled by active adapters which act as DisplayPort Sink devices, in order to facilitate easier updates to latest HDMI and DisplayPort specs, and work with dual-link HDMI, DisplayPort connections with either fewer than 4 lanes or different data rates, and multiple DisplayPort streams. It should be noted that DVI 1.0 spec was finalized in 1999 and the DVI industry consortium has since disbanded, so future updates to DVI specification are unlikely; also, although dual-link HDMI Type B connector is defined in the HDMI specification, it has not seen any practical use as of 2012.
Multiple displays on single DisplayPort connector
DisplayPort 1.2 added support for Multi-Stream Transport (MST), enabling multiple monitors to be used via a single DisplayPort connector. This function requires either monitors that are capable of DisplayPort 1.2 daisy-chaining, or use of a DisplayPort MST Hub. The first MST hub became available in September 2013, enabling up to 3 displays to be connected to a single DisplayPort connector.
Single Stream Transport (SST) was specified in DisplayPort 1.1a for use between a single Source and Sink Device.
Advantages over DVI, VGA and FPD-Link
||This article contains embedded lists that may be poorly defined, unverified or indiscriminate. (November 2010)|
In December 2010, several computer vendors and display makers including Intel, AMD, Dell, Lenovo, Samsung and LG announced they would begin phasing out FPD-Link, VGA, and DVI-I over the next few years, replacing them with DisplayPort and HDMI. One notable exception to the list of manufacturers is Nvidia, who has yet to announce any plans regarding future implementation of legacy interfaces.
DisplayPort has several advantages over VGA, DVI, and FPD-Link.
- Open standard available to all VESA members free of charge, royalty-free and extensible standard to help broad adoption
- Fewer lanes with embedded self-clock, reduced EMI with data scrambling and spread spectrum mode
- Based on a micro-packet protocol
- Allows easy expansion of the standard with multiple data types
- Flexible allocation of available bandwidth between audio and video
- Multiple video streams over single physical connection (version 1.2)
- Long-distance transmission over alternative physical media such as optical fiber (version 1.1a)
- High-resolution displays and multiple displays with a single connection, via a hub or daisy-chaining.
- HBR2 mode with 17.28 Gbit/s of effective video bandwidth allows four simultaneous 1080p60 displays (CEA-861 timings), stereoscopic 2,560 × 1,600 × 30 bit @120 Hz (CVT-R timings), or 4K UHDTV @60 Hz [note 1]
- HBR3 mode with 25.92 Gbit/s of effective video bandwidth, using CVT-R2 timings, allows eight simultaneous 1080p displays ( 1,920 × 1,080 @60 Hz), stereoscopic 4K UHDTV ( 3,840 × 2,160 @120 Hz), or 5K UHDTV ( 5,120 × 2,880 @60 Hz) each using 24 bit RGB, and up to 8K UHDTV ( 7,680 × 4,320 ) @60 Hz using 4:2:0 subsampling
- Designed to work for internal chip-to-chip communication
- Link training with adjustable amplitude and preemphasis adapts to differing cable lengths and signal quality
- Reduced bandwidth transmission for 15 metres (49 ft) cable, at least 1920×1080p60 at 24 bits per pixel
- Full bandwidth transmission for 3 metres (9.8 ft)
- High-speed auxiliary channel for DDC, EDID, MCCS, DPMS, HDCP, adapter identification etc. traffic
- Can be used for transmitting bi-directional USB, touch-panel data, CEC, etc.
- Self-latching connector
Comparison with HDMI
Although DisplayPort has much of the same functionality as HDMI, it is a complementary connection used in different scenarios. DisplayPort can emit an HDMI signal through the use of a passive adapter connected to a port that is designed for dual-mode.
The DisplayPort specification defines the standard as royalty-free, while HDMI charges an annual fee of $10,000 to each high-volume manufacturer plus between US$0.04 and US$0.15 per device. HDMI Licensing counters the "royalty-free" claim by pointing out that the DisplayPort specification leaves open the possibility of charging for implementation. DisplayPort 1.2 has more bandwidth at 21.6 Gbit/s (17.28 Gbit/s with overhead removed) as opposed to HDMI 2.0's 18 Gbit/s (14.4 Gbit/s with overhead removed), and DisplayPort 1.3 raises that to 32.4 Gbit/s (25.92 Gbit/s with overhead removed). It also has the ability to share this bandwidth with multiple streams of audio and video to separate devices.
DisplayPort in native mode lacks some HDMI features such as Consumer Electronics Control (CEC) commands, which allow the control of multiple devices through a single remote; VESA asserts that CEC commands can be transmitted over the AUX channel if needed. HDMI uses unique Vendor-Specific Block structure, which allows for features such as additional color spaces. However, these features can be defined by CEA EDID extensions.
Figures from IDC show that DisplayPort was on 5.1 percent of commercial desktops and 2.1 percent on commercial notebooks in 2009. However, they predict that the figure for commercial desktops will grow to 89.5 percent, and for commercial notebooks to 95 percent by 2014. The main factor behind this is the phase out of VGA, and that both Intel and AMD will also stop building products with FPD-Link, by 2013.
Since its introduction in 2006, DisplayPort has gained popularity within the computer industry and is featured on many graphic cards, displays, and notebook computers. Dell was the first company to introduce a consumer product with a DisplayPort connector, the UltraSharp 3008WFP, which was released in January 2008. Soon after, AMD and Nvidia released products to support the technology. AMD included support in the Radeon HD 3000 series of graphics cards, while Nvidia first introduced support in the GeForce 9 series starting with the GeForce 9600 GT.
Later the same year, Apple introduced several products featuring a Mini DisplayPort. The new connector – proprietary at the time – eventually became part of the DisplayPort standard, however Apple reserves the right to void the license should the licensee "commence an action for patent infringement against Apple". In 2009, AMD followed suit with their Radeon HD 5000 Series of graphics cards, which featured the Mini DisplayPort on the Eyefinity versions in the series.
The following companies have participated in preparing the drafts of DisplayPort, eDP, iDP, or DDM standards:
- AMD Graphics Product Group
- Broadcom Corporation
- Chi Mei Optoelectronics
- Display Labs
- Foxconn Electronics
- Genesis Microchip
- Gigabyte Technology
- Hirose Electric Group
- Integrated Device Technology
- JAE Electronics
- Kawasaki Microelectronics (K-Micro)
- LG Display
- NXP Semiconductors
- Xi3 Corporation
- Parade Technologies
- Realtek Semiconductor
- SyntheSys Research Inc.
- Texas Instruments
- Tyco Electronics
The following companies have additionally announced their intention to implement DisplayPort, eDP or iDP:
- Circuit Assembly
- Hall Research Technologies
- ITE Tech.
- Matrox Graphics
- Micro-Star International
- MStar Semiconductor
- Novatek Microelectronics Corp.
- Palit Microsystems Ltd.
- Pioneer Corporation
- S3 Graphics
- Quantum Data
- Sparkle Computer
- Dual-link DVI is limited in resolution and speed by the quality and therefore the bandwidth of the DVI cable, the quality of the transmitter, and the quality of the receiver; can only drive one monitor at a time; and cannot send audio data. HDMI 1.3 and 1.4 are limited to effectively 8.16 Gbit/s or 340 MHz (though actual devices are limited to 225–300?MHz), and can only drive one monitor at a time. VGA connectors have no defined maximum resolution or speed, but their analog nature limits their bandwidth, though can provide long cabling only limited by appropriate shielding.
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- SlimPort Consumer website
- SlimPort Enabled Devices