ETA10

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The ETA10 was a line of vector supercomputers designed, manufactured, and marketed by ETA Systems, a spin-off division of Control Data Corporation (CDC). The ETA10 was announced in 1986, with the first deliveries made in early 1987. The system was an evolution of the CDC Cyber 205, which can trace its origins back to the CDC STAR-100.

By 1990, ETA Systems was reincorporated into CDC and production discontinued, and many of the users, such as Florida State University, negotiated Cray hardware in exchange.[1]

Historical development[edit]

CDC had a strong history of creating powerful mainframe computers, with an emphasis on the scientific computing customer base. One of the most famous computer architects to emerge from CDC was Seymour Cray. While he went on to form his own company, Cray Research, work continued at CDC in developing high-end mainframe computers (supercomputers)—led by another famous architect, Neil Lincoln. As Cray competed against CDC, it became apparent to top management that it needed to decrease the development time for the next generation computer—thus a new approach was considered for the follow-on to the Cyber 205.

After spinning off from CDC in September 1983, ETA set a goal of producing a supercomputer with a cycle time less than 10ns. To accomplish this, several innovations were made. Among these was the use of liquid nitrogen for cooling the CMOS-based CPUs.

The ETA10 successfully met the company's initial goals (10 GFLOPS), with some models achieving a cycle time of about 7 ns - considered rapid by mid-1980s standards. They delivered 7 liquid nitrogen-cooled versions and 27 smaller, air cooled versions. The CMOS circuits produced only a fraction of the heat of previous ICs.The planned 1987 follow-on was supposed to be designated Cyber 250 or ETA30, as in 30 GFLOPS. ETA was eventually reincorporated back into CDC, ceasing operations on April 17, 1989.

Operating systems and applications[edit]

The ETA10 series could run either ETA's EOS operating system, which was widely criticized for various problems, or a port by Lachman Associates, a software personnel firm, of UNIX System V (Release 3). While EOS suffered a reputation for poor quality, ETA's UNIX was better received by customers.

Use of the ETA10 was rather complicated, and required all programs be loaded via attached Apollo Computer workstations. The program would then run once, and to run again would require re-loading from the Apollo. The ETA10 itself had no graphical console or local network interface, and all visualization of resulting data was performed by separate workstations after being retrieved from the Apollos. Programming for the ETA10 series could be done in FORTRAN, C, or assembly language.

Criticism[edit]

Despite eventual adoption of UNIX, poorly developed system software remained one flaw of the ETA10 line. According to one description of the system:

Without NSF funding, the von Neumann center could be doomed. "I don’t think we can function without federal support," says Cohen. Even if the center does operate at a vastly reduced level, its machines continue to be plagued by software problems. The NSF review panel found that the ETA10 suffered a software failure once every 30 hours, and that its ability to run programs on more than one of its eight processors at any one time was poor. Although its hardware is still considered state-of-the-art, the overall package is an "extremely immature computer system," the panel concluded.[2]

The late delivery and operating problems contributed to this demise as well as management problems.[3]

It is a mistake to believe that ETA's demise was based solely on operating system choice or existence. The Fortran compiler (ftn200) had not changed from the CDC205. This compiler retained vendor-specific programming performance features (known as the Q8* subroutine calls) in an era when supercomputer users were realizing the necessity of source code portability between architectures. Additionally, the compiler optimizations were not keeping up with existing technology as shown by the Japanese supercomputer vendors as well as the newer minisupercomputer makers and competition at Cray Research.

In general, computer hardware manufacturers prior and up to that period tended to be weak on software. Libraries and available commercial and non-commercial (soon to be called open-source) applications help an installed base of machine. CDC was relatively weak in this area. It is worth noting that some of the best operating systems that CDC provided to customers were productized versions of an OS written by Lawrence Livermore Laboratories.

According to NASA, the hardware was very poorly designed, and failed to complete any acceptance tests at Ames Research Center. This one event is considered amongst CDC insiders to be the downfall of ETA, which folded as a result of NASA saying no (and in a domino effect DOD, etc.).

Models[edit]

The ETA10-F and ETA10-G (7 ns clock cycle) were the highest-performing members of the ETA10 line, and used liquid nitrogen cooling to achieve rapid cycle times.

Less-costly air-cooled versions were later offered, such as the two-processor ETA10-Q (19 ns clock cycle), and the ETA10-P, which was also called "Piper".

Any of the ETA10 models could be built in either single- or multi-processor configurations.

Performance[edit]

Between the highest-performing, liquid-nitrogen cooled models (ETA10-E, G, etc.) and the cheaper, air-cooled models (ETA10-P, Q, etc.), the ETA10 line spanned a 27:1 performance range. Peak performance on the top-of-the-line models reached 10 GFLOPS.

According to LINPACK benchmark, an ETA10 with a single processor achieved 52 MFLOPS on 100^2 LINPACK.

Description[edit]

The ETA10 was a multiprocessor system that supported up to eight CPUs. Each CPU was similar to that of a two-lane Cyber 205. One of the main innovations of the ETA10 was how the CPU was implemented: the CPU was made of 250 CMOS gate array integrated circuits mounted on a 44-layer printed circuit board (PCB). Each gate array contained 20,000 gates and was fabricated using 1.25-micrometre (μm) technology that was accessible from the VHSIC program at Honeywell. In contrast, mainstream commercial technology at the time was in the 3 to 5 μm range.

CMOS circuitry, which was not typically used in vector supercomputer CPUs at the time, was chosen because of the high density achievable, which reduces both the on-chip and off-chip delay. The CPU delays were managed through careful tuning of each PCB manufactured in conjunction with the logic technology and incorporated two key technologies known as JTAG and BIST. The gate arrays were designed using a combination of internally developed simulator and placement tools, and one of the first commercial electronic design automation tools (an application for schematic capture) from Mentor Graphics. Prior to the use of schematic capture at ETA, designers used textual netlists to describe the interconnection of the logic circuits.

However, CMOS circuitry at that time was significantly slower than that of bipolar circuitry, especially the emitter-coupled logic that was widely used in vector supercomputer CPUs at the time. To compensate for this, the CPU was immersed in -196.15 °C liquid nitrogen for cooling. Although such cooling could potentially speed up the CMOS logic by a factor of four, in practice the liquid nitrogen cooling yielded an approximately twofold speed increase over air-cooled systems. However, because liquid nitrogen cooling yielded only marginal performance benefits, none of the ETA10 systems used such cooling for either the local or shared memories. It is of particular note that in order for this type of cooling to be effective, a closed-loop system was required. ETA had to innovate to make this possible, since there were not any commercially available solutions in the market. The 44-layer PCB was also innovative, and ETA had to develop new processes to manufacture it.

Each CPU had its own 4 million word local memory built from SRAM ICs. Each CPU is also connected to a 256 million word shared memory built from DRAM ICs. In addition to these memories, there is a communication buffer used for CPU synchronization and other multiprocessor-related protocol communication. I/O was facilitated by one to eighteen I/O processors that each have a direct path to the shared memory. The ETA10 used fiber-optic lines for communication between the CPUs and I/O devices, a novel approach for systems interconnection in the 1980s.

Installations[edit]

Before ETA Systems was reincorporated into CDC, a total of 25 systems were delivered. Among the recipients were:

By the end of the 1980s, the remaining ETA10 systems were donated to high schools through a computer science competition, SuperQuest:

See also[edit]

  • EOS, the operating system ETA Systems developed in-house

References[edit]

  1. ^ Bauer, Jeff (1991), A History of Supercomputing at Florida State University 
  2. ^ Anderson, Christopher (Nov 27, 1989), NSF Supercomputer Program Looks Beyond Princeton Recall, The Scientist, 3 (23): 2 
  3. ^ Brenner, Al (1994), "The John von Neumann Computer Center: An Analysis", in Karyn R. Ames; Alan Brenner, Frontiers of Supercomputing II: A National Reassessment, pp. 469–480 
  • R.W. Hockney and C.R. Jesshope, Parallel Computers 2: Architecture, Programming and Algorithms, Adam Hilger, 1988, pp. 185–190.

External links[edit]