Extreme ultraviolet lithography
- 1 EUVL light source
- 2 EUVL optics
- 3 EUV-specific overlay issues
- 4 EUV exposure of photoresist
- 5 EUVL defects
- 6 Unexpected resolution limits
- 6.1 Angle of Incidence
- 6.2 Resist Polymer Aggregates
- 6.3 Resist Line Roughness
- 6.4 Shot noise
- 6.5 Proximity effect (secondary electrons)
- 6.6 Photoelectron trajectories
- 6.7 Efficient photoresist heating
- 6.8 Point spread function of resist
- 6.9 Uncertainty principle
- 6.10 EUV diffraction and multilayer angle bandwidth
- 6.11 EUV mask absorber thickness variation
- 6.12 Higher magnification mask stitching
- 7 EUVL demonstrations
- 8 Timing impact
- 9 Resource requirements: EUV vs. ArF immersion double patterning
- 10 EUV with Double Patterning
- 11 References
- 12 Further reading
- 13 Related links
EUVL light source
Neutral atoms or condensed matter cannot emit EUV radiation. For matter to emit it, ionization must take place first. EUV light can only be emitted by electrons which are bound to multicharged positive ions; for example, to remove an electron from a +3 charged carbon ion (three electrons already removed) requires about 65 eV. Such electrons are more tightly bound than typical valence electrons. The thermal production of multicharged positive ions is only possible in a hot dense plasma, which itself strongly absorbs EUV. The Xe or Sn plasma sources for EUV lithography are either discharge-produced or laser-produced. Discharge-produced plasma is made by lightning bolt's worth of electric current through a tin vapor. Laser-produced plasma is made by microscopic droplets of molten tin heated by powerful laser. Laser-produced plasma sources (e.g., ASML's NXE:3300B scanner) outperform discharge-produced plasma sources. Power output exceeding 100 W is a requirement for sufficient throughput. While state-of-the-art 193 nm ArF excimer lasers offer intensities of 200 W/cm2, lasers for producing EUV-generating plasmas need to be much more intense, on the order of 1011 W/cm2. This indicates the enormous energy burden imposed by switching from generating 193 nm light (laser output approaching 100 W) to generating EUV light (required laser or equivalent power source output exceeding 10 kW). An EUV source driven by a 200 kW CO2 laser with ~10% wall plug efficiency consumes an electrical power of ~2 MW, while a 100 W ArF immersion laser with ~1% wall plug efficiency consumes an electrical power of ~10 kW.
A further characteristic of the plasma-based EUV sources under development is that they are not even partially coherent, unlike the KrF and ArF excimer lasers used for current optical lithography. Further power reduction (energy loss) is expected in converting incoherent sources (emitting in all possible directions at many independent wavelengths) to partially coherent (emitting in a limited range of directions within a narrow band of wavelengths) sources by filtering (unwanted wavelengths and directions). On the other hand, coherent light poses a risk of monochromatic reflection interference and mismatch of multilayer reflectance bandwidth.
As of 2008[update], the development tools had a throughput of 4 wafers per hour with a 120 W source. For a 100 WPH requirement, therefore, a 3 kW source would be needed, which is not available in the foreseeable future. However, EUV photon count is determined by the number of electrons generated per photon which are collected by a photodiode; since this is essentially the highly variable secondary yield of the initial photoelectron, the dose measurement will be impacted by high variability. In fact, data by Gullikson et al. indicated ~10% natural variation of the photocurrent responsivity. More recent data for silicon photodiodes remain consistent with this assessment. Calibration of the EUV dosimeter is a nontrivial unsolved issue. The secondary electron number variability is the well-known root cause of noise in avalanche photodiodes.
The highly relativistic vacuum tubes free-electron lasers and synchrotron radiation sources can give better light quality than material sources can, though high intensity may require development work. Several dedicated industrial synchrotron light facilities have been built, and their applications include semiconductor device fabrication. Free electron lasers offer light that is monochromatic and coherent, as well as narrow in space and angle spread. Both also offer a continuous range of available wavelengths, allowing seamless progress into the X-ray band.
At SPIE 2014, TSMC reported that the 200 kW CO2 laser for their NXE:3100 EUV tool light source had a misalignment problem. The laser was supposed to focus on a tin droplet which absorbs the power to generate EUV light. Missing the droplet directed the power elsewhere, leading to component damage, and some downtime.
EUVL is a significant departure from the deep ultraviolet lithography used today. All matter absorbs EUV radiation. Hence, EUV lithography needs to take place in a vacuum. All the optical elements, including the photomask, must make use of defect-free Mo/Si multilayers which act to reflect light by means of interlayer interference; any one of these mirrors will absorb around 30% of the incident light. This limitation can be avoided in maskless interference lithography systems. However, the latter tools are restricted to producing periodic patterns only.
The pre-production EUVL systems built to date contain at least two condenser multilayer mirrors, six projection multilayer mirrors, and a multilayer object (mask). Since the optics already absorbs 96% of the available EUV light, the ideal EUV source will need to be sufficiently bright. EUV source development has focused on plasmas generated by laser or discharge pulses. The mirror responsible for collecting the light is directly exposed to the plasma and is therefore vulnerable to damage from the high-energy ions and other debris. This damage associated with the high-energy process of generating EUV radiation has precluded the successful implementation of practical EUV light sources for lithography.
The wafer throughput of an EUVL exposure tool is a critical metric for manufacturing capacity. Given that EUV is a technology requiring high vacuum, the throughput is limited (aside from the source power) by the transfer of wafers into and out of the tool chamber, to a few wafers per hour.
Another aspect of the pre-production EUVL tools is the off-axis illumination (at an angle of 6 degrees) on a multilayer mask. The resulting asymmetry (leading to non-telecentricity) in the diffraction pattern causes shadowing effects which degrade the pattern fidelity.
Heating per feature volume (e.g., 20 nm cube) is higher per EUV photon compared to a DUV photon, due to higher absorption in resist. In addition, EUV lithography results in more heating due to the vacuum environment, in contrast to the water cooling environment of immersion lithography.
Heating is also a particularly serious issue for multilayer mirrors used, because, as EUV is absorbed within a thin distance from the surface, the heating density is higher. As a result, water cooling is expected to be used for the high heating load; however, the resulting vibration is a concern.
Heating of the EUV mask pellicle (film temperature up to 750 K for 80 W incident power) is a significant concern, due to the resulting deformation and decrease of transmission.
A recent study by NIST and Rutgers University found that multilayer optics contamination was highly affected by the resonant structure of the EUV mirror influencing the photoelectron generation and secondary electron yield.
Since EUV is highly absorbed by all materials, even EUV optical components inside the lithography tool are susceptible to damage, mainly manifest as observable ablation. Such damage is a new concern specific to EUV lithography, as conventional optical lithography systems use mainly transmissive components and electron beam lithography systems do not put any component in the way of electrons, although these electrons end up depositing energy in the exposed sample substrate.
In 2012, the Laser-Laboratorium Göttingen and KLA-Tencor reported that a Ru-capped Mo/Si multilayer could be damaged by a single pulse (16° incidence at 13.5 nm) as low as 30 mJ/cm2, and the damage threshold can be lowered ~60% with ten pulses. This was attributed to the cumulative probability of defect occurrence with multiple pulses.
Another collaboration study in 2010, using Mo/Si multilayers with 42-44% reflectivity at ~28° incidence, started showing damage for single pulse at a level of ~45 mJ/cm2.
EUV-specific overlay issues
Because EUV operates in a vacuum and requires reflective optics, EUV lithography tools have special overlay concerns, recently studied by IMEC, along with ASML. Electrostatic chucks must be used instead of conventional vacuum chucks. Therefore the wafer clamping variability on the electrostatic chuck needs to be dealt with. A backside coating of 200 nm silicon nitride (which must be removed later to allow backside cooling and heatsinking) was found to be helpful. Other than this additional step, which also requires first protecting the device layers already patterned, zone alignment (using all alignment marks across the wafer, not a standard subset) also provided some improvement. The vacuum environment required by EUV also leads to heating of the wafer without much dissipation. A sacrificial first wafer was found to be necessary to stabilize the chuck temperature. Moreover, the local overlay corrections due to exposure heating requires the use of a second wafer. Thus, an extra wafer per lot is required for overlay stabilization in EUV lithography. The use of reflection causes wafer exposure position to be extremely sensitive to the reticle flatness and the reticle clamp. Reticle clamp cleanliness is therefore required to be maintained.
The off-axis illumination of the reticle is also the cause of non-telecentricity in wafer defocus, which consumes most of the overlay budget of the NXE:3300 EUV scanner even for design rules as loose as 100 nm pitch.
EUV exposure of photoresist
When an EUV photon is absorbed, photoelectrons and secondary electrons are generated by ionization, much like what happens when X-rays or electron beams are absorbed by matter. It has been estimated that about 4 secondary electrons on average are generated for every EUV photon, although the generation volume is not definite. These secondary electrons have energies of a few to tens of eV and travel tens of nanometers inside photoresist (see below) before initiating the desired chemical reaction. This is very similar to the photoelectron migration for the latent image formation in silver halide photographic films. A contributing factor for this rather large distance is the fact that polymers have significant amounts of free volume. In a recent actual EUV print test, it was found 30 nm spaces could not be resolved, even though the optical resolution and the photoresist composition were not the limiting factor.
e- + acid generator -> anion -> dissociated anion products
This reaction, also known as "electron attachment" or "dissociative electron attachment" is most likely to occur after the electron has essentially slowed to a halt, since it is easiest to capture at that point. The cross-section for electron attachment is inversely proportional to electron energy at high energies, but approaches a maximum limiting value at zero energy. On the other hand, it is already known that the mean free path at the lowest energies (few to several eV or less, where dissociative attachment is significant) is well over 10 nm, thus limiting the ability to consistently achieve resolution at this scale. In addition, electrons with energies < 20 eV are capable of desorbing hydrogen and fluorine anions from the resist, leading to potential damage to the EUV optical system.
EUV photoresist images often require resist thicknesses roughly equal to the pitch. This is not only due to EUV absorption causing less light to reach the bottom of the resist but also to forward scattering from the secondary electrons (similar to low-energy electron beam lithography). Conversely, thinner resist transmits a larger fraction of incident light allowing damage to underlying films, yet requires more dosage to achieve the same level of absorption.
Since the photon absorption depth exceeds the electron escape depth, as the released electrons eventually slow down, they dissipate their energy ultimately as heat.
An EUV dose of 1 mJ/cm2 generates an equivalent photoelectron dose of 10.9 μC/cm2. Current demonstration doses exceed 10 mJ/cm2, or equivalently, 109 μC/cm2 photoelectron dose.
The use of higher doses and/or reduced resist thicknesses to produce smaller features only results in increased irradiation of the layer underneath the photoresist. This adds another significant source of photoelectrons and secondary electrons which effectively reduce the image contrast. In addition, there is increased possibility of ionizing radiation damage to the layers below.
The extent of secondary electron and photoelectrons in blurring the resolution is dependent on factors such as dose, surface contamination, temperature, etc.
Due to the high efficiency of absorption of EUV by photoresists, heating and outgassing become primary concerns. Organic photoresists outgas hydrocarbons while metal oxide photoresists outgas water and oxygen The carbon contamination is known to affect multilayer reflectivity while the oxygen is particularly harmful for the ruthenium capping layers on the EUV multilayer optics.
EUVL faces specific defect issues analogous to those being encountered by immersion lithography. Whereas the immersion-specific defects are due to unoptimized contact between the water and the photoresist, EUV-related defects are attributed to the inherently ionizing energy of EUV radiation. The first issue is positive charging, due to ejection of photoelectrons freed from the top resist surface by the EUV radiation. This could lead to electrostatic discharge or particle contamination as well as the device damage mentioned above. A second issue is contamination deposition on the resist from ambient or outgassed hydrocarbons, which results from EUV- or electron-driven reactions. A third issue is etching of the resist by oxygen, argon or other ambient gases, which have been dissociated by the EUV radiation or the electrons generated by EUV. Ambient gases in the lithography chamber may be used for purging and contamination reduction. These gases are ionized by EUV radiation, leading to plasma generation in the vicinity of exposed surfaces, resulting in damage to the multilayer optics and inadvertent exposure of the sample.
Of course mask defects are also a known source of defects for EUVL. Reducing defects on extreme ultraviolet (EUV) masks is currently one of the most critical issues to be addressed for commercialization of EUV lithography. The defect core, namely the pit or particle, can originate either on the substrate, during multilayer deposition or on top of the multilayer stack. The printability of the final defect will depend on the phase change and the amplitude change of light at a given position. The net phase change and/or amplitude change adds to the intrinsic effect of the core defect and its influence on the growth of the multilayer stack during deposition. The buried defects are particularly insidious, and even 10 nm defects may be considered risky. The phase shift caused by an undetected 3 nm mask substrate flatness variation is sufficient to produce a printable defect. The principle behind this is a quarter-wavelength deviation from the flat surface produces a half-wavelength optical path difference after reflection. The light that is reflected from the flat surface is 180 degrees out of phase with the light reflected from the quarter-wavelength deviation. It has been shown that even a 1 nm deviation from flatness would lead to a substantial reduction (~20%) of the image intensity. In fact, defects of atomic scale height (0.3-0.5 nm) with 100 nm FWHM can still be printable by exhibiting 10% CD impact. Like a lens, any defect which effectively produces a phase shift scatters light outside the defect region. The amount of light that is scattered can be calculated. Furthermore, the edge of a phase defect will further reduce reflectivity by more than 10% if its deviation from flatness exceeds 3 degrees, due to the deviation from the target angle of incidence of 84 degrees with respect to the surface. Even if the defect height is shallow, the edge still deforms the overlying multilayer, producing an extended region where the multilayer is sloped. The more abrupt the deformation, the narrower the defect edge extension, the greater the loss in reflectivity.
Unexpected resolution limits
Given that EUV is a significant reduction in wavelength compared to current lithography wavelengths, one would expect significantly better resolution. However, the resolution is ultimately determined by other factors besides diffraction, such as the interaction volume in the image recording medium, i.e., the photoresist. As noted above, the low energy electrons released by EUV could blur the original EUV image. In addition, there are statistical effects, especially for feature areas less than 1500 square nanometers. The multilayer supporting EUV optics is also of limited bandwidth, posing scaling limits which would require further modification.
Angle of Incidence
The reflective nature of the optics requires an off-axis angle of incidence onto the mask containing the pattern. For the smallest allowed pitches, the angle of incidence is extremely restricted to the Bragg's Law condition so that the smallest angle with the surface normal is given by sin(minimum angle)=sin(incident angle)-0.5*wavelength/(4*pitch), with 4 being the demagnification factor (ratio of mask line pitch to target line pitch). For a wavelength of 13.5 nm and an axis-defined incident angle of 6°, a pitch of 16 nm leads to a minimum angle below 0, which is forbidden. Practically, the minimum line pitch should therefore be 19-20 nm to allow a minimum angle of 1°, 28 nm to allow the minimum angle to be reduced 2.5°. To reduce the minimum pitch, either the wavelength must be reduced or the axis-defined angle of incidence increased. When increasing the axis-defined angle of incidence, the range of all possible angles of incidence (inversely proportional to the minimum pitch, from the above equation) increases as well, requiring a larger angular bandwidth for all the multilayers making up the EUV optical components, not just the mask. This will require a significant change to the existing EUV infrastructure.
Resist Polymer Aggregates
Resists as polymers are well-known to have aggregates with sizes up to 80 nm. Even the high-resolution resist HSQ has aggregate size reduced down to only 15–20 nm. While the roughness of lines larger than the aggregate size are mildly affected by the aggregate size, below the aggregate size obviously the linewidth can be severely affected.
Resist Line Roughness
A model for resist line roughness caused by defects proposed in 1994 predicted that if minimum EUV dose levels for a given linewidth were not met, the resulting roughness from sidewall or base defects would be prohibitive. For 20 nm linewidth and below, the minimum dose easily exceeds 100 mJ/cm2 for resists that are not chemically amplified.
A dose sensitivity of 5 mJ/cm2 implies only several thousand EUV photons or so accumulate in such a small area. With the natural Poisson distribution due to the random arrival times of the photons, there is an expected natural dose variation of at least a few percent 3 sigma, making the exposure process fundamentally uncontrollable for features less than about 40 nm. Increasing the dose will reduce the shot noise, but will also increase the flare dose and generate more free electrons. The free electrons will spread out before slowing to a stop. Since the free electron density is lower than the initial photon density, the shot noise is always effectively larger than expected from just considering the EUV dose.
In 2008, Intel calculated that for printing one billion 30 nm contacts, ± 16% dose error @10 mJ/cm2 (scales to ± 13% dose error @15 mJ/cm2) is expected from the EUV shot noise. With acid counting, the fluctuation increases to ± 20%. This issue will affect 22 nm patterning integration. When one considers that within a 1 nm pixel, the shot noise is even more significant (>100% on 10 nm scale @10 mJ/cm2), the origin of the line edge roughness (LER) issue in EUV lithography becomes clearer.
The 2D patterns often encountered in DRAM and logic microprocessors (including multiple pattern line cutting for 11 nm node complementary lithography) as well as the floating gate flash memory patterns with 2D isolation for charge trapping are more susceptible to shot noise than line-type features. It is because the 2D pattern (ideally rectangular) is defined by the number of photons in a limited area exposed above or below a certain threshold dose.
|feature diameter (nm)||minimum dose to avoid 5% dose error among 1 million features (mJ/cm2)||targeted dose (mJ/cm2)||throughput at targeted dose (300 mm WPH)|
A 5% dose error has been found to result in ~1 nm CD error, or equivalently, an error of 1 mJ/cm2 at ~15 mJ/cm2 results in ~2 nm CD error. Although the minimum dose to avoid 5% dose error within a population of a million contacts is doubling every generation, the industry targeted dose is not keeping up. To at least make up the minimum dose, the throughput will be reduced by the same ratio. 1 ppm of a population is about 4.75 standard deviations away from the mean dose. For reference, Nvidia reported in 2011 that via defect levels need to be less than one in a billion, so that the minimum dose estimates above would need to be even tighter. 1 ppb of a population is 6 standard deviations away from the mean dose, raising the minimum dose requirement by 60%.
Ref.: SPIE Proc. 8326-96, 8683-36, 8679-50 (2013)
The wafer-per-hour (WPH) throughput estimates provided by EUV suppliers assume a dose of 15 mJ/cm2, which currently allows about a minute of exposure time per wafer. However, the consideration of shot noise challenges this assumption, in which case EUV throughput targets can be put at risk, e.g., 60 WPH @15 mJ/cm2 becomes 20 WPH @45 mJ/cm2.
TSMC also found that to match the shot noise performance for 193 nm light exposure at 70 nm hole size at 25-35 mJ/cm2, the required dose for EUV exposure for 30 nm hole size must be more than 4 times larger, while to scale down the CD uniformity proportionately, it would have to be more than 16 times larger.
The shot noise issue is also applicable to the features patterned on masks used for EUV, targeted at 20 nm and below. A 12 uC/cm2 absorbed dose used to pattern 80 nm contact holes on a mask (to print 20 nm on wafer) inevitably experiences 10% shot noise in the dose level over the population of a billion such contact holes.
The partially coherent light source is often represented as a collection of hundreds to thousands of points, each an independent source of photons. Furthermore, the asymmetric variation of the multilayer reflectivity with respect to different angles of incidence results in source points on one side being effectively brighter than those on the other. A million photons, e.g., 100 source points x 10,000 photons/point, at a dose of 10 photons/nm2, would cover a 100,000 nm2 area (~300 nm x 300 nm), far exceeding the theoretical resolution.
Carl Zeiss, the maker of the EUV Aerial Image Metrology System (AIMS), recently concluded that 15,000 photons per 18 nm pixel (corresponding to a dose of 68 mJ/cm2) were required to guarantee sufficient CD fidelity.
The shot noise has strong bearing on the EUV source power issue mentioned above. For 10 mJ/cm2, the power at intermediate focus should be 180 W; currently it is about 20 W at high duty cycle. However, significant shot noise may force minimum doses to be at least 42 mJ/cm2 for 20 nm feature size (e.g., 20 nm cuts in 20 nm half-pitch lines) and 169 mJ/cm2 for 10 nm feature size (e.g., 10 nm contacts on 14 nm half-pitch lines), therefore indicating the EUV source power to be a moving target becoming ever more difficult to reach. These minimum dose values already exceed the multilayer pulse damage thresholds indicated above. Actually, the most widely acknowledged concern of such high doses is the increased resist ougassing (30 mJ/cm2 being prohibitive). Furthermore, if the doses increase by at least a factor of ~3, the crosslinking of the resist polymer becomes significant. As discussed below, due to high absorption, heating is more significant. For chemically amplified resists, higher dose exposure also increases line edge roughness due to acid generator decomposition. There could be some shot noise relief for the brighfield exposures which would be used for contact hole patterns with negative-tone metal oxide resists; flare has more severe impact (loss of image contrast) in brightfield exposures with higher doses. Soft x-ray exposures of HSQ resist have shown 50-70 nm linewidth increase related to increased reactions beyond exposure boundaries, due to dose increase in the 100 mJ/cm2 range.
Proximity effect (secondary electrons)
It is now recognized that for insulating materials like PMMA, low energy electrons can travel quite far (several nanometres is possible). For example, in sub-10 nm thick SiO2, negligible electron scattering is expected. This is due to the fact that below the ionization potential the only energy loss mechanism is mainly through phonons and polarons. It should be noted that polaronic effects are manifest more strongly in ionic crystals than polymers and covalently bonded materials. In fact, polaron hopping could extend as far as 20 nm.
Recent studies indicate that the EUV secondary electron range in commercial resist is practically in the range of a few nanometers. This range has to be negligible (<10%) compared to the critical dimension, indicating current difficulties for sub-20 nm application.
|Material||10 eV electron inelastic mean free path*|
(*) On average, an electron with 10 eV energy travels this distance in the material before losing energy.
|Material||<3 eV electron attenuation length|
|Pentacene||7.5 ± 1.0 nm|
|Perylene||80 ± 8.0 nm|
In a classic experiment by Feder et al. at IBM, an erbium layer on a PMMA resist layer was exposed to X-rays. The erbium layer absorbed the X-rays strongly, producing low energy secondary electrons. The X-rays which were not absorbed continued to penetrate into the PMMA, where they were only lightly absorbed. Upon removal of the erbium layer and subsequent PMMA development in solvent, the resist removal rate was found to be accelerated for the top 40 nm of the PMMA film, while it was much more gradual for the rest of the film. The accelerated rate was due to the secondary electron exposure, while the gradual rate was due to the X-ray absorption. This proved the maximum secondary electron exposure range of 40 nm in this case.
K. Murata also calculated the impact of 92 eV Auger electrons emitted into a layer of PMMA from a Si substrate during X-ray exposure. The range of exposure of the PMMA was 50 nm.
A more recent experiment was performed by Carter et al. at MIT and University of Wisconsin–Madison, where the X-ray absorber generating the electrons was beneath the PMMA resist rather than on top of it. In this case, the accelerated dissolution of PMMA started approximately 50 nm above the substrate.
The significance of this secondary electron range is the appearance of a "proximity effect" for distances on the order of 50 nm or less. This causes the exposure tolerance to be reduced dramatically as feature sizes decrease below this range. Even though features can still print below this range, the resolution is affected by the randomness of energy distribution. The difference in experimentally determined ranges above (40 nm vs. 50 nm) is an indication of this fundamental variability. The secondary electron exposure can also be thought of as a blur effect. The blur is generally not included in optical-only image simulations.
The proximity effect is also manifest by photoelectrons and secondary electrons leaving the top surface of the resist and then returning some tens of nanometers distance away. This also can be understood in terms of the emitted electrons forming a space charge cloud above the surface which is attracted to the positively charged surface in the vertical direction but laterally disperses (in vacuum) due to the negative charge mutual repulsion.
The secondary electron proximity effect was recently demonstrated by Stanford University using a scanning probe tip that emitted electrons in the 40–60 eV energy range. Dose sensitivity was demonstrated more than 25 nm away from the exposure center. It indicates that within a 50 nm range of exposure widths, the low-energy (EUV-generated) electron distribution influences the linewidth distribution. This is a new effect not seen with conventional optical lithography.
Photoelectron emission microscopy (PEEM) data was used to show that low energy electrons ~1.35 eV could travel as far as ~15 nm in SiO2, despite an average measured attenuation length of 1.18 nm.
A study by the College of Nanoscale Science and Engineering (CNSE) presented at the 2013 EUVL Workshop indicated that, as a measure of EUV photoelectron and secondary electron blur, 50-100 eV electrons easily penetrated beyond 15 nm of resist thickness (PMMA or commercial resist), indicating more than 30 nm range of resist affected centered on the EUV point of absorption. Furthermore dielectric breakdown discharge is possible.
A 2012 study by Synopsys and IMEC revealed that the secondary electron effect on acid generation is on the order of several nm away from the initial secondary electron generation site. In combination with shot noise and post-exposure effects, this resulted in CDs ranging from 17 to 40 nm for a 32 nm half-pitch contact hole array.
Kotera et al. performed EUV photoelectron trajectory simulations, showing their range to be 30 nm. The spread of the energy deposition by these electrons can account for the observed line edge roughness. The top layer exposure is effectively less because electrons emitted from the surface never come back.
Efficient photoresist heating
Ritucci et al., reported on the improved thermal ablation efficiency for EUV wavelengths compared to DUV wavelengths. Since EUV exceeds the bandgap of all materials, it is more easily absorbed than longer wavelengths, and the same dose of incident energy results in more heating; even ~100 mJ/cm2 would be hot enough to result in ablation. The resolution of chemically amplified photoresists is determined by thermally driven acid diffusion (spreading). It is worth noting that even at the ablation dose of 100 mJ/cm2, the shot noise for a 1 nm pixel is still significant (3σ/avg = 36%), which could severely impact a critical dimension (CD) for which the pixel is at least 5%, i.e., 20 nm or less.
Point spread function of resist
Kozawa et al. determined the point spread function of EUV chemically amplified resists using a basic acid generation calculation and simulation fit. The range of acid generation extended ~20 nm from the absorption point, entailing a ~40 nm resolution limit.
Given that photoresists easily diffuse acid molecules, it would be no surprise that the smaller and lighter electrons produced by EUV or other ionizing radiation would diffuse faster and further, rendering the expected optical resolution meaningless.
The resist blur based on print results at the end of 2008 is in the range of 10-16 nm. Half-pitch resolution is still a struggle below 30 nm, and line edge roughness is still a major issue.
A study in 2011 focusing on 22 nm and 24 nm half-pitch indicated a temperature-dependent blur for the post-exposure bake process, ranging from ~5 nm at 80 °C to ~10 nm at ~110 °C. The secondary electron blur was reported to be not observed in this range. The aerial images were corrected for the estimated flare (which would include any long-range secondary electron blur).
As secondary electron generation involves inelastic scattering with momentum transfer, there will be an associated position uncertainty. As lower energy electrons have less momentum transfer, the delocalization of the secondary electron generation process tends to be higher (~nm), which would have a more direct impact on LER.
EUV diffraction and multilayer angle bandwidth
Resolution requirements below 20 nm require higher numerical aperture (N.A.) EUV optical systems supported by multilayer optics. However, the larger aperture necessarily entails larger angles of incidence as well as a larger range of incident angles. The multilayer currently used in EUV masks and optical systems tends to cut off light at larger angles which is required to image tighter pitches. For 2D patterns like dense contact holes, contrast already decreases from 80% to <75% going from 19 nm to 18 nm half-pitch, 14 nm half-pitch is already in need of multilayer tuning, and in fact, without the use of increased demagnification (above 4X) to help reduce the angles, no imaging beyond ~13 nm half-pitch is possible. Such demagnification would result in large photomask substrate sizes or else multiple small fields (on different masks).
In fact, for EUV mask pitches of 8 wavelengths or less (demagnified 4x to 2 wavelengths (13-14 nm half-pitch) or less on the wafer), diffraction into the multilayer at larger angles is another source of significant image degradation, which requires intensive computation to evaluate. For larger angles, the multilayer reflectance decreases significantly. Rigorous EM simulations for the EUV binary mask at different magnifications have already indicated that for the standard 4X magnification, the diffraction order efficiencies starts varying significantly with new asymmetry (non-telecentricity) below 20 nm half-pitch.
Telecentricity considerations alone indicate substantial difficulty using EUV below 28 nm half pitch, due to worsening telecentricity error.
EUV mask absorber thickness variation
A study published in 2011 by ASML, Brion and Zeiss found that EUV mask absorber thickness has significant effect on exposure latitude and mask error enhancement. This was observed at 27-32 nm half-pitch. Furthermore, the effects were noticeably different for different conventional illumination settings. For example, for 32 nm line-and-space patterns, the optimum dose-to-size differed by more than 30%, while best bias differed by more than 4 nm, between 55.4 nm and 58 nm thickness (+/- 2.3% thickness variation). The mask absorber thickness could be optimized for size and exposure latitude for different conventional mask patterns. There remains a tradeoff of exposure latitude vs. throughput. The absorber still allows some fraction of light to pass in one direction, and the top surface itself reflects some light. The optimum absorber thickness is a linear function of the half-pitch, as well as the range of incident angles. Even at the optimum absorber thickness, there is sufficient reflectivity to present a field-to-field flare effect from the mask border. The shadowing effect is more obvious with thicker absorber. The absorber thickness needs to be tightly controlled across the mask and from mask-to-mask to prevent proximity matching errors. Furthermore, the absorber thickness needs to be considered for OPC determination. With a typical CD sensitity of around 1 nm/cm2, for 27-32 nm lines, the issue is severe enough that there is a proposal to completely etch away the absorber and multilayer at the mask image field border, which entails a second layer or level of patterning in the mask fabrication, as in the case of a phase-shift mask.
Higher magnification mask stitching
For higher numerical apertures, as noted above, it would be necessary to increase the angle of reflection in the EUV optical system. However, this could require retuning of the multilayers. As an alternative, the magnification of the system may be increased beyond 4X, for example to 8X. However, this would require either larger EUV mask substrates, or else the division of chip patterns among two or more conventional 6" EUV masks. The chip pattern would have to be constructed from stitching two or more likely four sub-patterns together. In this case, the mask change time is a key influence on the overall throughput.
Interference lithography at the Paul Scherrer Institute has been used to demonstrate sub-10 nm line-space features. The resist performance tested with this source does not reflect the performance expected for an EUV projection tool due to the limited contrast of projection tools.
In 1996, a collaboration between Sandia National Laboratories, University of California at Berkeley, and Lucent Technologies, produced NMOS transistors with gate lengths from 75 nm to 180 nm. The gate lengths were defined by EUV lithography. The device saturation current at 130 nm gate length was ~0.2 mA/um. A 100 nm gate device showed subthreshold swing of 90 mV/decade and saturated transconductance of 250 mS/mm. A commercial NMOS at the same design rule patterned by then-state-of-the-art DUV lithography showed 0.94 mA/um saturation current and 860 mS/mm saturated transconductance. The subthreshold swing in this case was less than 90 mV/decade.
In February 2008, a collaboration including IBM and AMD, based at the College of Nanoscale Science and Engineering (CNSE) in Albany, New York, used EUV lithography to pattern 90 nm trenches in the first metal layer of a 45 nm node test chip. No specific details on device performance were given. However, the lithographic performance details given still indicated much to be desired:
- CD uniformity: 6.6%
- Overlay: 17.9 nm x, 15.6 nm y, possibly correctable to 6.7 nm x, 5.9 nm y
- Power: 1 W at wafer (>200 W required for high volume), with a dose of 3.75 mJ/cm2
- Defects: 1/sq. cm.
The high defect level may not be unexpected as AMD's 45 nm node Metal 1 design rule was 90 nm while the same EUV exposure theoretically could result in printed defects below 30 nm originating from mask defects larger than 100 nm. Optical lithography pushed beyond its natural resolution limit has a significant advantage in this regard.
Apparently, the CNSE EUV tool suffered from a well-known 16% flare problem. Flare effects may be difficult to separate from the secondary electron effects discussed earlier.
In August 2008, SEMATECH demonstrated a 22 nm half-pitch using chemically-amplified photoresist. However, even at 15 mJ/cm2, the linewidth roughness was very significant, 5–6 nm, so that even the image pitch regularity was challenged.
In April 2009, IMEC fabricated 22 nm SRAM cells where the contact and Metal 1 layers (~45 nm design rule) were printed with EUV lithography. However, it was acknowledged that EUV would not be ready when companies start using 22 nm. In addition, it was commented that the feature edge profiles indicated slope asymmetry related to the characteristic EUV illumination asymmetry. Whereas this demonstration only focused on a limited number of ~45 nm features, Intel's shot noise calculation above for billions of features ~30 nm indicates difficult challenges ahead for manufacturing.
In late 2009, KLA-Tencor and GlobalFoundries along with Lawrence Berkeley National Labs published a paper which showed the stochastic behavior of EUV-generated secondary electrons in EUV resists. In particular, 32 nm half-pitch trenches showed significant edge roughness, width roughness and critical dimension (CD) variability. It may also explain the ~ 15 nm resist blur observed in an earlier study.
EUV Device Damage
MOSFETs made with Ge showed large sensitivity to EUV doses, starting to degrade even at levels of 10-20 mJ/cm2.
As early as 2003, there was still optimism that EUVL would quickly be commercialized, as exemplified by the following quote: "Good progress has been made on all the technology fronts. Commercialization in 2009 remains the main goal for all the EUV community." However, as of 2012, EUVL still has not been commercialized.
The difficulties of EUV stem mainly from the difficulty of EUV light generation and the sensitivity of EUV light to surface contamination and roughness. The rise of multiple patterning, essentially a wavelength-independent technique, is also further jeopardizing its introduction. Intel's Justin Rattner has said that creation of the needed (longer wavelength) masks was a prime use of high performance computing.
In July 2009, ASML Holding and Cymer Inc. announced the shipment of the first fully integrated laser-produced plasma (LPP) extreme ultraviolet (EUV) lithography light source from Cymer to ASML, where it is supporting integration and testing of next generation EUV lithography scanners.
In July 2009, a review of the EUV infrastructure indicated that there were significant gaps remaining, in particular for mask defect inspection. The gaps may not be filled until 2013 or later, which would impact the rollout of EUV for high-volume manufacturing by 2015.
It was most recently indicated that EUV mask features ~100 nm half-pitch (on the mask itself) were at the current resolution limit of EUV mask generation. Since these features would be demagnified 4X for upcoming 300 mm tools, it would indicate the mask itself would not be able to conventionally print good images at ~25 nm half-pitch or below. The same study reiterated that resolution was not limited by the optics but by the resist response, which prevented sub-20 nm half-pitch even with mask resolution enhancement. This resolution limit on the mask itself could be tied to the shot noise issue pointed out above which is involved in the fabrication of the mask.
In June 2010, TSMC announced it would take delivery of an EUV system for R&D purposes, to be delivered in 2011. The tool's weight reportedly warranted purchasing a special clamp costing more than 2 million USD.
In July 2010, at Semicon West 2010, ASML updated the resolution achieved by EUVL, the status being 24 nm in 2010, but with a severely degraded NILS (normalized image log-slope) below 1.0, indicating poor lithographic quality. In fact, as finer resolution is projected, the NILS is expected to go to 0, indicating impossibility of EUVL use.
In 2010, Samsung cited various additional processes still needed to be developed to address line-width roughness (LWR), arising from the shot noise discussed earlier, which would drive up costs. In addition, it cited out-of-band wavelengths in the DUV range as causing flare effects; this was also observed by others.
At SPIE 2010, researchers from the Center for X-ray Optics at Lawrence Berkeley National Laboratory and the University of California, Berkeley presented results showing that replicated surface roughness (RSR) from the substrate to the multilayer surface as low as 50 pm could induce phase errors that are imaged as speckle with defocus, which would lead to line-edge roughness (LER) that could not be tolerated for the 22 nm and 16 nm nodes. This spec is much smaller than current capabilities. For reference, the Bohr radius is 53 pm and the rms surface roughness of silicon wafers is on the order of 100 pm.
ASML EUV tools in use or in development
|Available Year||EUV Tool||Resolution||Throughput goal||Dose, Source|
|2006||ADT||32 nm||4 WPH||5 mJ/cm2, ~8W|
|2010||NXE:3100||27 nm||60 WPH||10 mJ/cm2, >100W|
|2012||NXE:3300B||22 nm||125 WPH||15 mJ/cm2, >250W|
|2013||NXE:3300C||16 nm if <7 nm resist diffusion length||150 WPH||15 mJ/cm2, >350W|
Source: ASML, International Workshop on EUVL, Maui 2010
The NXE:3300B scanner uses 13.5 nm EUV light generated by very hot tin. High-energy laser turns microscopic droplets of molten tin into a plasma which emits EUV light.
Timing for 1x nm and beyond
Hynix has found that 193 nm immersion lithography with double patterning could resolve down to ~ 20 nm, while the more cost-conscious EUV approach could only resolve down to 28 nm, less than a generation's improvement over 193 nm immersion lithography single patterning's resolution limit of 38 nm.
Due to its current resolution limitations and lack of readiness, EUVL has recently been supplanted by multiple patterning using existing immersion lithography tools as the lithography of choice for current 20-nm class NAND Flash technology generations and beyond. Samsung and IM Flash Technologies have already started using spacer double patterning for their 3X nm and 2X nm NAND Flash. Toshiba and SanDisk are already starting to make 19 nm NAND flash in 2011. In fact, with EUV single exposure resolution still exceeding 22 nm, multiple patterning would be necessary for ~10-14 nm regardless of using EUV or ArF wavelength. At IEDM 2011, Hynix is expected to report on 1X nm NAND technology using quadruple spacer patterning.
In September 2009, Intel disclosed that for its 15 nm process, EUV did not appear to be ready in timely fashion. Hence, Intel is preparing to extend 193 nm immersion lithography with double and possibly triple patterning to 15 nm. Currently, it is also exploring the feasibility of EUV for its 11 nm logic node; however, 2D contact patterning still appears only good to ~ 26 nm half-pitch, while a special rinse for improving line width roughness appears very pitch-dependent. Intel has declared that even without EUV, it could still use 193 nm immersion lithography at the 11 nm node.
As of 2010, it has been observed that EUV would be delayed until 2015 to allow the development of the required EUV inspection tools. On the other hand, manufacturer roadmaps show 2012–2013 as the timing needed for 1x nm, precluding the use of EUV. Consideration of long-term implementation of EUVL will now need to consider sub-10 nm design rules. However, at this point, due to larger electric field vector angles, polarization effects become important. The effective flare for 10 nm half-pitch lines-spaces due to polarization effects is 11%. The difficulty of EUV is the lack of polarization control (no laser sources, only plasmas).
ASML has indicated that below 16 nm capability would require a larger illumination angle than the current 6°, and hence require a fundamental change to the current EUV multilayer optics infrastructure. In particular, apodization (non-uniformity of intensity across the light entrance pupil), due to different reflectivity at different angles, becomes more severe for higher numerical apertures.
Canon indicated at the 1st International EUVL Symposium that higher NA EUV systems would exhibit a larger difference of system transmittance between the two different polarizations, due to the larger range of angles being accessed.
Another issue is that for sub-10 nm applications, the electron beam lithography for EUV mask patterning, already burdened by throughput issues, will have practical resist difficulties for meeting the resolution requirement. In fact, for 20 nm and below, the current electron-beam mask writers cannot repeatably deliver 80 nm sizes on the mask, which corresponds to 20 nm on the wafer.
Recent EUV zone plate lithography reports have indicated that for sub-20 nm half-pitch, even next-generation lithography would require double patterning; in fact, double patterning may not be sufficient even for sub-12 nm half-pitch. As a result, the overlay and throughput requirements would need to be at least twice as stringent as before.
At the 2011 LithoVision conference, Intel indicated that EUV technology is already late for even Intel's 10 nm design rule planning.
ASML has suggested that the 13.5 nm EUV wavelength is expected to be used down to 10 nm, beyond which a new EUV wavelength of 6.6 to 6.8 nm is expected to be used for finer resolution. Tools currently projected thru 2015 are not expected to reach 15 nm resolution.
Cymer delayed its EUV 20 W source delivery from first quarter to second quarter of 2012.
As of beginning of 2012, EUV has significant issues remaining in the areas of source power, defects, overlay, resist, and mask.
As of July 2012, 6 NXE:3100 tools (now discontinued) and 11 NXE:3300 tools have been ordered for process development and 4 NXE:3300 tools targeted for production; the latter order was split between Samsung and SKHynix.
At the 2013 EUVL Workshop, Intel announced that EUV would still be under development in 2015, and hence would be targeted for 2017 7 nm HVM. Consequently, 10 nm would be carried out with ArF immersion multiple patterning. Moreover, ArF immersion pitch quartering seems more likely than EUV (single patterning) to be extended to 7 nm by avoiding going below the k1=0.3 limit. TSMC and GlobalFoundries have made similar statements.
At the 2013 iEUVi Mask TWG update, it was revealed that the EUV mask infrastructure will have to be re-defined to allow the scaling to 14 nm half-pitch and beyond. This roadmap clarification also means continued delays for EUV.
At its Q4 2013 earnings conference call in January 2014, ASML mentioned that 19 nm node DRAM would be using double patterning with DUV rather than EUV and that EUV development by ASML with customers for 16 nm DRAM would start later in the year.
As of January 2014, the EUV production throughput capability is 50 WPH; its next line of EUV tools, the NXE:3350, is planned to have EUV source self-cleaning capability. As contingency for EUV, ASML is already shipping the NXT:1970Ci, an immersion tool capable of multiple patterning.
As of April 2014, processing capability was 100 wafers per day (WPD) with 50% availability and upgraded to 200 WPD in July 2014. ASML targets 70 WPH in 2014 and 500 WPD or 40 WPH (500 WPD / 24 h / 0.5) excluding availability around the end of 2014, 125 WPH in 2015, and up to 1,500 WPD (125 WPH with 50% availability) in 2016.
At the 2013 EUVL Workshop, a collaboration (Applied Materials/IMEC/Micron) study on the implementation of spacer patterning for EUVL  indicated that the local CD uniformity of ~30 nm contact holes was influenced by shot noise. Furthermore, it was indicated that the current choice for low 1xnm half-pitch patterning is 193i SAQP (already being used for 16 nm NAND by Micron) or EUV SADP.
Resource requirements: EUV vs. ArF immersion double patterning
|Utility||200 W output EUV||90 W output ArF immersion double patterning|
|Electrical power (kW)||532||49|
|Cooling water flow (L/min)||1600||75|
Source: Gigaphoton, Sematech Symposium Japan, September 15, 2010
The required utility resources are significantly larger for EUV compared to 193 nm immersion, even with double patterning. Hynix reported at the 2009 EUV Symposium that the wall plug efficiency was ~0.02% for EUV, i.e., to get 200 W at intermediate focus for 100 WPH, one would require 1MW of input power, compared to 165 kW for an ArF immersion scanner, and that even at the same throughput, the footprint of the EUV scanner was ~3x the footprint of an ArF immersion scanner, resulting in productivity loss. Additionally, to confine ion debris, a superconducting magnet may be required.
EUV with Double Patterning
The resolution limit for EUV single patterning is ~15-19 nm half-pitch, while that for ArF double patterning is 30-20 nm half-pitch, which suggests EUV double patterning rather than single patterning should succeed ArF double patterning. Taking into account the telecentricity and mask absorber complications related to asymmetry at 27 nm half-pitch, the practical resolution is comparable to ArF immersion. Owing to the various current limitations on EUV reaching 10 nm half-pitch, such as the current EUV multilayer angle bandwidth for ~13-14 nm half-pitch, multiple patterning is the planned approach to extend planned 0.33 NA NXE:3300 tools to 10 nm half-pitch. The currently expected year of introduction of EUV into production is 2015 at roughly 20 nm half-pitch, allowing one generation (~20-13 nm) of single-exposure patterning use. In Intel's complementary lithography scheme at 20 nm half-pitch, EUV would be used only in a second line-cutting exposure after a first 193 nm line-printing exposure. The cost may be compared to the expected multiple exposures using 193 nm light only. Some ~20 nm half-pitch patterns, e.g., 22 nm half-pitch DRAM active areas, may be patterned by a single 193 nm exposure using a special mask. At the ITRS 2012 Winter Conference, the Lithography Update indicated the use of EUV with double patterning for 14 nm half-pitch in 2017. A return to extended generations of single exposure patterning would be possible with a wavelength even shorter than the 13.5 nm EUV wavelength. Such a wavelength (~6.7 nm) would be beyond EUV, and is often referred to as BEUV (Beyond Extreme UltraViolet).
- Tao, Y.; et al. (2005). "Characterization of density profile of laser-produced Sn plasma for 13.5 nm extreme ultraviolet source". Appl. Phys. Lett. 86 (20): 201501. doi:10.1063/1.1931825.
- Coons, R. W.; et al. (2010). "Comparison of EUV spectral and ion emission features from laser-produced Sn and Li plasmas". Proc. SPIE 7636: 763636. doi:10.1117/12.848318.
- Paetzel, R.; et al. (2003). "Excimer lasers for superhigh NA 193-nm lithography". Proc. SPIE 5040: 1665. doi:10.1117/12.485344.
- Harilal, S. S.; et al. (2006). "Spectral control of emissions from tin doped targets for extreme ultraviolet lithography". J. Phys. D 39 (3): 484. doi:10.1088/0022-3727/39/3/010.
- Trintchouk, F.; et al. (2006). "XLA-300: the fourth-generation ArF MOPA light source for immersion lithography". Proc. SPIE 6154: 615423. doi:10.1117/12.658723.
- V. Bakshi, 2009 EUVL Workshop Summary, Sheraton Waikiki, Hawaii, July 13–17, 2009.
- Cymer presentation at 2007 EUV Source Workshop
- Saleh, B. E. A.; Teich, M. C. (1991). Fundamentals of Photonics. New York: John Wiley & Sons. p. 521. ISBN 0471839655.
- IEEE Spectrum: A New Light Source
- Chen, F. T. (2003). "Asymmetry and thickness effects in reflective EUV masks". Proc. SPIE 5037: 347. doi:10.1117/12.483602.
- ASML update on ADT
- Gullikson, E. M.; et al. (1996). "Stable silicon photodiodes for absolute intensity measurements in the VUV and soft X-ray regions". J. Electron Spec. and Rel. Phenom. 80: 313–316. doi:10.1016/0368-2048(96)02983-0.
- Keister, J. W. (2007). "Silicon Photodiodes for Absolute Soft X-ray Radiometry". Proc. SPIE 6689: 26. doi:10.1117/12.741601.
- Berger, K. W.; Campiotti, R. H. (2000). "Absolute dosimetry for extreme-ultraviolet lithography". Proc. SPIE 3998: 838. doi:10.1117/12.386448.
- Donati, S. (2000). Photodetectors: Devices, Circuits and Applications. Upper Saddle River, NJ: Prentice-Hall PTR. p. 182. ISBN 0130203378.
- Robert W. Hamm and Marianne E. Hamm, "The Beam Business: Accelerators in Industry", Physics Today, June 2011, pp. 49-50
- TSMC reports EUV status
- H. Komori et al., Proc. SPIE 5374, pp. 839–846 (2004).
- B. A. M. Hansson et al., Proc. SPIE 4688, pp. 102–109 (2002).
- S. N. Srivastava et al., J. Appl. Phys.' 102, 023301 (2007).
- A. Brunton et al., Proc. SPIE 5448, pp. 681-692 (2004).
- L. Peters, "Double Patterning Leads Race for 32 nm", Semiconductor International, October 18, 2007.
- M. Sugawara et al., J. Vac. Sci. Tech. B 21, 2701 (2003).
- M. Chandhok et al., J. Vac. Sci. Tech B 22, 2966 (2004).
- S. Jeong et al., Proc. SPIE 3997, 431 (2000).
- I-S. Kim et al., Proc. SPIE vol. 8322, 83222X (2012).
- N. S. Faradzhev et al., Bull. of the Russ. Acad. of Sci., Physics, vol. 74, pp. 28–32 (2010).
- F. Barkusky et al., Optics Express 18, 4346 (2010).
- M. Muller et al., Appl. Phys. A 108, 263 (2012).
- A. R. Khorsand et al., Optics Express vol. 18, 700 (2010).
- J. V. Hermans et al., Proc. SPIE 7969, 79691M (2011).
- D. Tretheway and E. S. Aydil, J. Electrochem. Soc., vol. 143, 3674 (1996).
- M. S. Bakir et al., CICC 2007, 421 (2007).
- J. A. van der Pol et al., Microelectronics Rel., 39, 863 (1999).
- J. Mathuni et al., Wafer Backside Paper
- Brewer Science LED Brochure featuring Substrate Protection
- NXE:3300B information from ASML
- X. Liu et al., Proc. SPIE vol. 9048, 90480Q (2014).
- B. L. Henke et al., J. Appl. Phys. 48, pp. 1852–1866 (1977).
- SPIE EUV08 paper by T. Kozawa and S. Tagawa
- N. Shimizu and H. Sato, 1996 IEEE Annual Report - Conference on Electrical Insulation and Dielectric Phenomena, pp. 787–790 (1996)
- Y. Ekinci et al., Microelectronic Engineering, vol. 84, pp. 700–704 (2007). Conference draft.
- T. Kozawa et al., J. Vac. Sci. Tech. B 15, pp. 2582–2586 (1997).
- T. Kozawa et al., J. Vac. Sci. Tech. B 22, pp. 3489-3492 (2004).
- E. Stoffels et al., Plasma Sources Sci. & Tech. 10, 311-317 (2001).
- M. P. Seah and W. A. Dench, Surf. Interf. Anal. 1, 2-11 (1979).
- S. Tanuma et al., Surf. Interf. Anal. 21, 165–176 (1993).
- B. Yakshinskiy et al., Intl. Symp. on EUVL 2009
- C. Song et al., Chem. Mater. 20, 3473–3479 (2008).
- H. H. Solak et al., Microel. Eng. 67–68, pp. 56–62 (2003).
- G. Denbeaux et al., 2007 European Mask and Lithography Conference.
- I. Pollentier et al., Proc. SPIE vol. 7972, 797208 (2011).
- G. Denbeaux, 2009 Intl. Workshop on EUV Lithography.
- J. Y. Park et al., J. Vac. Sci. Tech. B29, 041602 (2011).
- N. Koch et al., Thin Solid Films 391, pp. 81–87 (2001).
- J. Hollenshead and L. Klebanoff, J. Vac. Sci. & Tech. B 24, pp. 118–130 (2006).
- J. Hollenshead and L. Klebanoff, J. Vac. Sci. & Tech. B 24, pp. 64–82 (2006).
- M. H. L. van der Velden et al., J. Appl. Phys. 100, 073303 (2006).
- M. Lam, Ph.D. dissertation, U. of California, Berkeley, sec. 7.3 (2005).
- P. P. Naulleau et al., Optics Communications 200, pp. 27–34 (2001).
- I.-Y. Kang et al., Jap. J. Appl. Phys. vol. 44, pp. 5724–5726 (2005).
- S. Huh et al., Proc. SPIE 7271 (2009).
- R. Petit et al., Electromagnetic Theory of Gratings, Springer-Verlag, 1980.
- C. A. Cutler et al., Proc. SPIE vol. 5037, 406 (2003).
- D. Lauvernier et al., Microelectonic Eng. 75, 177–182 (2004).
- E. W. Scheckler et al., J. Vac. Sci. Tech. B 12, 2361 (1994).
- EUV resist TWG 2008
- Intel extending ArF lithography to 11 nm node
- T. Wallow et al., Proc. SPIE vol. 8322, 83221J (2012).
- P-Y. Yan et al., J. Micro/Nanolith. MEMS MOEMS 10, 033011(2011).
- F. A. J. M. Driessen et al., Proc. SPIE vol. 8166, 81660Z (2011).
- 2014 NXE platform review by ASML
- erfc calculator
- J. Chen, 2011 IMEC Technology Forum
- D. C. Brandt et al., Proc. SPIE 8322, 83221I (2012).
- Z-Y. Pan et al., Proc. SPIE vol. 6924, 69241K (2008).)
- GlobalFoundries plans EUV by 2015
- L. Szu-Kai and C. C. P. Chen, Proc. SPIE vol. 7274, 727436 (2009).
- H. Kirchauer PhD Thesis (1998).
- K. Tian et al., Proc. SPIE vol. 7274, 72740C (2009).
- M. Bass (ed.), Handbook of Optics, 2.20, McGraw-Hill, 2010.
- V. Domnenko et al., Proc. SPIE 7271, 727141 (2009).
- H. Feldmann et al., Proc. SPIE 7636, 76361C (2010).
- D. C. Brandt et al., Proc. SPIE vol. 7271, 727103 (2009).
- F. T. Chen et al., Proc. SPIE 8326, 8326L (2012).
- 2013 Nissan Chemical Industries, 2013 International Workshop on EUV Lithography
- S. M. Tamboli et al., Ind. J. Chem. Tech., vol. 11, 853 (2004).
- J. N. Helbert et al., Macromolecules, vol. 11, 1104 (1978).
- J. P. Cain et al., Proc. SPIE 5751, 301 (2005).
- T. Kozawa, Jap. J. Appl. Phys. 51, 06FC01 (2012).
- R. Gronheid et al., Proc. SPIE 8322, 83220M (2012).
- J. K. Stowers et al., Proc. SPIE 7969, 796915 (2011).
- Y. Tanaka et al., Proc. SPIE 6921, 69211D (2008).
- A. G. Caster et al., J. Vac. Sci. Tech. B 28, 1304 (2010).
- S. Lombardo et al., J. Appl. Phys., 84, 472 (1998).
- M. Dapor et al., J. Micro/Nanolith. MEMS MOEMS 9, 023001 (2010).
- C. Kittel, Introduction to Solid State Physics, 6th ed. (John Wiley & Sons, 1986), pp. 281-3.
- P. T. Henderson et al., Proc. Natl. Acad. Sci. USA 96, 8353-8358 (1999).
- J. Torok et al., J. Photopolym. Sci. Tech. vol. 26, 625 (2013).
- D. Emfietzoglou et al., Nucl. Instr. & Meth. in Phys. Res. B 267, 45–52 (2009).
- H.-J. Fitting et al., J. Elec. Spec. & Rel. Phenom. 119, 35–47 (2001).
- S. Hino, N. Sato, H. Inokuchi, Chem. Phys. Lett. vol. 37, 494 (1976).
- R. Feder et al., J. Vac. Sci. Tech. 12, 1332 (1975).
- K. Murata, J. Appl. Phys. 57, 575 (1985).
- D. J. D. Carter et al., J. Vac. Sci. & Tech. B 15, pp. 2509–2513 (1997).
- K. Yamazaki et al., Jap. J. Appl. Phys. 36, 7552-7556 (1997).
- V. V. Ivin et al., Micr. Eng. 61-62, 343-349 (2002).
- R. Renoud et al., J. Phys. Cond. Matt. 10, 5821-5832 (1998).
- K. Wilder et al., J. Vac. Sci. Tech. B 16, 3864 (1998).
- V. W. Ballarotto et al., JVST B 20, 2514-2518 (2002).
- G. Denbeaux et al., 2013 International Workshop on EUV Lithography.
- W. Gao et al., Proc. SPIE vol. 8322, 83221D (2012).
- M. Kotera et al., Microprocesses and Nanotechnology, 2007 Digest of Papers, pp. 94–95 (2007).
- M. Kotera et al., Jap. J. Appl. Phys. vol. 47, pp. 4944–4949 (2008).
- A. Ritucci et al., "Damage and ablation of large band gap dielectrics induced by a 46.9 nm laser beam," March 9, 2006 report UCRL-JRNL-219656 (Lawrence Livermore National Laboratory).
- T. Kozawa et al., Appl. Phys. Exp. 1, 027001 (2008).
- T. Watanabe and H. Kinoshita, J. Photopolymer Sci. and Tech., vol. 21, 777-784 (2008).
- R. Gronheid et al., J. Micro/Nanolith. MEMS MOEMS 10, 033004 (2011).
- J. Drucker and M. R. Scheinfein, Phys. Rev. B vol. 47, 15973-15975 (1993).
- S. P. Renwick, Proc. SPIE vol. 6520, 65202W (2007).
- J. T. Neumann et al., May 2013 BACUS Newsletter
- M. A. Golub and A. A. Friesem, J. Opt. Soc. Am. A, 24, 687 (2007).
- Louis, E.; et al. (2011). "Nanometer interface and materials control for multilayer EUV-optical applications". Prog. Surf. Sci. 86 (11–12): 255–294. doi:10.1016/j.progsurf.2011.08.001.
- C.-H. Lin et al., Microel. Eng. 84, 711 (2007).
- A. Erdmann et al., Proc. SPIE vol. 8679, 86791Q (2013).
- N. Davydova et al., Proc. SPIE vol. 7985, 79850X (2011).
- N. Davydova et al., Proc. SPIE vol. 8166, 816624 (2011).
- E. van Setten et al., Proc. SPIE vol. 7823, 78231O (2010).
- N. Davydova et al., Proc. SPIE vol. 8880, 888027(2013).
- J. T. Neumann et al., Proc. SPIE vol. 8522, 852211 (2012).
- K. Takehisa, Proc. SPIE vol. 8701, 87010T (2013).
- EUV-IL at PSI
- XIL beamline at PSI
- V. Auzelyte et al., J. Micro/Nanolith. MEMS MOEMS 8, 021204 (2009).
- K. B. Nguyen et al., J. Vac. Sci. Tech. B 14, 4188 (1996).
- S. Yang et al., IEDM '98 Technical Digest, pp. 197-200 (1998).
- B. La Fontaine et al., Proc. SPIE 6921, 69210P (2008).
- AMD uses EUV to pattern metal layer in 45 nm test chip
- B. Haavind and J. Montgomery, "SPIE: AMD, IBM tip first "full-field" EUV chip," Solid State Technology, Feb. 27, 2008
- O. R. Wood II et al., Proc. SPIE 6517, 65170U (2007).
- IMEC report on EUV printing of contacts
- Semiconductor International: Sematech EUV Resist at 22 nm Half-Pitch
- IMEC Makes 22 nm SRAM Cells With EUV Lithography
- J. J. Biafore et al., SPIE Lithography Asia 2009, Proc. SPIE 7520, 75201P (2009).
- KLA-Tencor brings stochastic modeling to EUV
- T. I. Wallow et al., Proc. SPIE 7273, 72733T (2009).
- Y-T. Chen et al., IEEE Elec. Dev. Lett., vol. 34, 1220 (2013).
- EUVA: 2nd EUVL Symposium at Antwerp, Belgium (2003)
- "Intel's extreme ultraviolet dream still somewhere over the rainbow."
- High-Power EUV lithography lightsources come of age
- Taking Semiconductor Manufacturing to the extreme
- SEMICON West - Lithography Challenges and Solutions
- P. Naulleau et al., Pushing EUV lithography development beyond 22-nm half pitch, LBNL Paper LBNL-2288E (2010).
- TSMC to take delivery of EUV lithography system in 2011
- TSMC facing EUV, Wafer Cost Challenges.
- H. Meiling, "EUVL - getting ready for volume introduction," Semicon West, July 14, 2010.
- O. Wood and B. LaFontaine, Source Power Requirement for HVM.
- U. S. Patent 6977715.
- H-W Kim et al., Proc. SPIE vol. 7636, 76360Q (2010).
- S. A. George et al., Proc. SPIE vol. 7636, 763626 (2010).
- H. Mizuno et al., Proc. SPIE vol. 7271, 72710U (2009).
- P. P. Naulleau et al., Proc. SPIE 7636, 76362H (2010).
- L. W. Shive and B. L. Gilmore, ECS Trans. vol. 16, 401-405 (2008).
- T-S. Eom et al., Proc. SPIE 7271, 727115 (2009).
- EETimes article on NAND Flash scaling 3/22/2010.
- C. Taylor, "Samsung intros 64-Gbit MLC NAND chip," Electronic News, October 23, 2007.
- M. LaPedus, Intel, Micron roll 34-nm NAND device, EETimes, 5/29/2008.
- Sandisk-Toshiba reclaim NAND process lead with 19 nm
- E. S. Putna et al., Proc. SPIE vol. 7969, 79692K (2011).
- e.g., US Patent Application 20090153826
- IEDM 2011 Press Tip Sheet
- Semiconductor International 9/14/2009 Intel Ramping 32 nm Manufacturing in Oregon
- EETimes 9/22/2009 Otellini: Intel to ship more SOCs than PC CPUs -- someday
- 22 nm HP Integrated Patterning Improvements for EUVL
- Intel Confirms Production of 22nm Processors for late 2011
- Sematech launches EUV metrology consortium
- SanDisk, 2/26/2010 Investor Day.
- T. Matsuyama et al., 2006 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, 50-56 (2006).
- J. Cobb et al., "Flare compensation in EUV Lithography," 2003 EUV Symposium, Antwerp.
- ASML, 2009 Lithography Workshop.
- ASML, Mask TWG, EUVL Symposium, 2008.
- K. Murakami et al., Proc. SPIE 8322, 832215 (2012).
- K. Bubke et al., Proc. SPIE vol. 6283, 628318 (2006).
- Y. Sekine et al., 1st International EUVL Symposium, 2002.
- H. Yang et al., Proceedings of the 1st IEEE Intl. Conf. on Nano/Micro Engineered and Molecular Systems, pp. 391–394 (2006).
- D2S announces litho tradeoffs at 20 nm and below
- W. Chao et al., JVST B 27, 2606-2611 (2009).
- W. Chao et al., Proc. SPIE vol. 6883, 688309 (2008).
- 2009 Sokudo Lithography Breakfast Forum
- EUV late for 10 nm
- ASML's EUV Roadmap Points to New Wavelength
- Cymer EUV roadmap slips
- Samsung resets EUV roadmap for memory scaling
- Foundry rivals say EUV not ready for prime time
- EUV misses 14 nm node
- R. Peeters and S. Young, ASML Images 2012 Issue 1, p. 4.
- ASML EUV tool update
- Samsung and SKHynix EUV order
- S. Sivakumar, Panel Discussion, 2013 EUVL Workshop.
- S. Sivakumar, EUV: From Development to HVM, 2013 EUVL Workshop.
- TSMC uses ArF immersion for 10 nm
- An Analysis of Lithography Solutions to 10 nm Logic Node and Beyond
- IEUVI Mask TWG Update (SEMATECH) Feb. 28 2013
- SeekingAlpha Q4 2013 ASML Conference Call
- ASML EUV revenue
- ASML Q3 2013 results
- ASML extending immersion lithography for multiple patterning
- SeekingAlpha Q1 2014 ASML Conference Call |quote=We remain on target to deliver EUV systems with a throughput of 70 wafers per hour in 2014, upgradeable to 125 wafers per hour in 2015.
- SeekingAlpha Q2 2014 ASML Conference Call |quote=Today, our NXT:3200 EUV systems are supplying customers with a 200 wafer per day processing capability
- ASML. "ASML reports 2013 results". US Securities and Exchange Commission. Retrieved 2014-07-16. "We remain on target to deliver EUV systems with a throughput of 70 wafers per hour in 2014, upgradeable to 125 wafers per hour in 2015."
- ASML. "ASML reports 2013 results". US Securities and Exchange Commission. Retrieved 2014-07-16.
- S. Padiyar et al., Sub-10nm HP Patterning using EUV based Self-Aligned Double Patterning
- R. Micheloni, A. Marelli, and K. Eshghi, Inside Solid State Drives (SSDs), Springer, 2013, p. 113.
- H. S. Kim, Future of Memory Devices and EUV Lithography, 2009 EUV Symposium
- H. Mizoguchi, "Laser Produced Plasma EUV Light Source Gigaphoton Update," EUVL Source Workshop, May 12, 2008.
- SEMATECH Front End Process Update
- E. van Setten et al., Proc. SPIE vol. 8352, 835205 (2012).
- ASML presentation at 2013 Semicon West
- Intel presentation on Complementary Lithography at 2012 International Workshop on EUV Lithography
- F. T. Chen et al., Proc. SPIE vol. 8683, 868311 (2013).
- S. Owa et al., Proc. SPIE vol. 9052, 90520O (2014).
- ITRS 2012 Litho One Pager April 24, 2012
- ASML presentation at 2010 International Workshop on Extreme Ultraviolet Sources
- Banqiu Wu and Ajay Kumar (May 2009). Extreme Ultraviolet Lithography. McGraw-Hill Professional, Inc. ISBN 0-07-154918-8.
- Banqiu Wu and Ajay Kumar (2009). "Extreme Ultraviolet Lithography: Towards the Next Generation of Integrated Circuits". Optics & Photonics Focus 7 (4).