# Hybrid-pi model

The hybrid-pi model is a popular circuit model used for analyzing the small signal behavior of bipolar junction and field effect transistors. Sometimes it is also called "Giacoletto model" because it was introduced by L.J. Giacoletto in 1969.[1] The model can be quite accurate for low-frequency circuits and can easily be adapted for higher frequency circuits with the addition of appropriate inter-electrode capacitances and other parasitic elements.

## Bipolar junction (BJT) parameters

The hybrid-pi model is a linearized two-port network approximation to the BJT using the small-signal base-emitter voltage $v_\mathrm{be}$ and collector-emitter voltage $v_\mathrm{ce}$ as independent variables, and the small-signal base current $i_\mathrm{b}$ and collector current $i_\mathrm{c}$ as dependent variables.[2]

Figure 1: Simplified, low-frequency hybrid-pi BJT model.

A basic, low-frequency hybrid-pi model for the bipolar transistor is shown in figure 1. The various parameters are as follows.

• $g_m = \frac{i_\mathrm{c}}{v_\mathrm{be}}\Bigg |_{v_\mathrm{ce}=0} = \frac {I_\mathrm{C}}{ V_\mathrm{T} }$ is the transconductance in siemens, evaluated in a simple model[3]
where:
• $I_\mathrm{C} \,$ is the quiescent collector current (also called the collector bias or DC collector current)
• $V_\mathrm{T} = \begin{matrix}\frac {kT}{ q}\end{matrix}$ is the thermal voltage, calculated from Boltzmann's constant $k$, the charge of an electron $q$, and the transistor temperature in kelvins, $T$. At approximately room temperature (295K, 22°C or 71°F) $V_\mathrm{T}$ is about 25 mV.
• $r_{\pi} = \frac{v_\mathrm{be}}{i_\mathrm{b}}\Bigg |_{v_\mathrm{ce}=0} = \frac{\beta_0}{g_m} = \frac{V_\mathrm{T}}{I_\mathrm{B}} \,$ in ohms
where:
• $\beta_0 = \frac{I_\mathrm{C}}{I_\mathrm{B}} \,$ is the current gain at low frequencies (commonly called hFE). Here $I_\mathrm{B}$ is the DC (bias) base current. This is a parameter specific to each transistor, and can be found on a datasheet.
• $r_\mathrm{O} = \frac{v_\mathrm{ce}}{i_\mathrm{c}}\Bigg |_{v_\mathrm{be}=0} = \frac {V_\mathrm{A}+V_\mathrm{CE}}{I_\mathrm{C}} \approx \frac {V_\mathrm{A}}{I_\mathrm{C}}$ is the output resistance due to the Early effect ($V_\mathrm{A}$ is the Early voltage).

### Related terms

The reciprocal of the output resistance is named the output conductance

• $g_\mathrm{ce} = \frac {1} {r_\mathrm{O}}$.

The reciprocal of gm is called the intrinsic resistance

• $r_\mathrm{E} = \frac {1} {g_m}$.

### Full model

Full hybrid-pi model

The full model introduces the virtual terminal B' so that the base spreading resistance rbb (the bulk resistance between the base contact and the active region of the base under the emitter) and rb'e (representing the base current required to make up for recombination of minority carriers in the base region) can be represented separately. Ce is the diffusion capacitance representing minority carrier storage in the base. The feedback components rb'c and Cc are introduced to represent the Early effect.[4]

## MOSFET parameters

Figure 2: Simplified, low-frequency hybrid-pi MOSFET model.

A basic, low-frequency hybrid-pi model for the MOSFET is shown in figure 2. The various parameters are as follows.

• $g_m = \frac{i_\mathrm{d}}{v_\mathrm{gs}}\Bigg |_{v_\mathrm{ds}=0}$

is the transconductance in siemens, evaluated in the Shichman-Hodges model in terms of the Q-point drain current $I_\mathrm{D}$ by (see Jaeger and Blalock[5]):

$\ g_m = \begin{matrix}\frac {2I_\mathrm{D}}{ V_{\mathrm{GS}}-V_\mathrm{th} }\end{matrix}$,
where:
$I_\mathrm{D}$ is the quiescent drain current (also called the drain bias or DC drain current)
$V_\mathrm{th}$ = threshold voltage and $V_\mathrm{GS}$ = gate-to-source voltage.

The combination:

$\ V_\mathrm{ov}= V_\mathrm{GS}-V_\mathrm{th}$

is often called overdrive voltage.

• $r_\mathrm{O} = \frac{v_\mathrm{ds}}{i_\mathrm{d}}\Bigg |_{v_\mathrm{gs}=0}$ is the output resistance due to channel length modulation, calculated using the Shichman-Hodges model as
$r_\mathrm{O} = \begin{matrix}\frac {1/\lambda+V_\mathrm{DS}}{I_\mathrm{D}}\end{matrix} \approx \begin{matrix} \frac {V_E L}{I_\mathrm{D}}\end{matrix}$,

using the approximation for the channel length modulation parameter λ[6]

$\lambda =\begin{matrix} \frac {1}{V_E L} \end{matrix}$.

Here VE is a technology-related parameter (about 4 V/μm for the 65 nm technology node[6]) and L is the length of the source-to-drain separation.

The reciprocal of the output resistance is named the drain conductance

• $g_\mathrm{ds} = \frac {1} {r_\mathrm{O}}$.