The IBM 650 Magnetic Drum Data-Processing Machine was one of IBM’s early computers, and the world’s first mass-produced computer. It was announced in 1953 and in 1956 enhanced as the IBM 650 RAMAC with the addition of up to four disk storage units. Almost 2,000 systems were produced, the last in 1962. Support for the 650 and its component units was withdrawn in 1969.
The 650 was a two-address, bi-quinary coded decimal computer (both data and addresses were decimal), with memory on a rotating magnetic drum. Character support was provided by the input/output units converting alphabetical and special characters to/from a two-digit decimal code. The 650 was marketed to scientific and engineering users as well as to users of punched card machines who were upgrading from calculating punches, such as the IBM 604, to computers. Because of its relatively low cost and ease of programming, the 650 was used to pioneer a wide variety of applications, from modeling submarine crew performance to teaching high school and college students computer programming.
The IBM 7070 (signed 10-digit decimal words), announced 1958, was expected to be a "common successor to at least the 650 and the [IBM] 705". The IBM 1620 (variable length decimal), introduced in 1959, addressed the lower end of the market. The UNIVAC Solid State (a two-address computer, signed 10-digit decimal words) was announced by Sperry Rand in December 1958 as a response to the 650. None of these had a 650 compatible instruction set.
The basic 650 system consisted of three units:
- IBM 650 Console Unit
- IBM 655 Power Unit
- IBM 533 or IBM 537 Card Read Punch Unit The IBM 533 had separate feeds for reading and punching; the IBM 537 had one feed, thus could read and then punch into the same card.
- IBM 46 Tape To Card Punch, Model 3
- IBM 47 Tape To Card Printing Punch, Model 3
- IBM 355 Disk Storage Unit Systems with a disk unit were known as IBM 650 RAMAC Data Processing Systems
- IBM 407 Accounting Machine
- IBM 543 Card Reader Unit
- IBM 544 Card Punch Unit
- IBM 652 Control Unit (magnetic tape, disk)
- IBM 653 Storage Unit (magnetic tape, disk, core storage, index registers, floating point arithmetic)
- IBM 654 Auxiliary Alphabetic Unit
- IBM 727 Magnetic Tape Unit
- IBM 838 Inquiry Station
Rotating drum memory models provided 1,000, 2,000, or 4,000 words of memory (a signed 10-digit number or five characters per word) at addresses 0000 to 0999, 1999, or 3999 respectively. Words on the drums were organized in bands around the drum, fifty words per band, and 20, 40, or 80 bands for the respective models. A word could be accessed when its location on the drum surface passed under the read/write heads during rotation (rotating at 12,500 rpm, the non-optimized average access time was 2.5 ms). Because of this timing, the second address in each instruction was the address of the next instruction. Instructions could then be interleaved, placing many at addresses that would be immediately accessible when execution of the previous instruction was completed. Instructions read from the drum went to a program register (in current terminology, an instruction register). Data read from the drum went through a 10-digit distributor. The 650 had a 20-digit accumulator, divided into 10-digit lower and upper accumulators with a common sign. Arithmetic was performed by a one-digit adder. The console (10 digit switches, one sign switch, and 10 bi-quinary display lights), distributor, lower and upper accumulators were all addressable; 8000, 8001, 8002, 8003 respectively.
The optional IBM 653 Storage Unit, was introduced on May 3, 1955, providing up to five features:
- Magnetic tape controller (for IBM 727 Magnetic Tape units)
- Disk storage controller (for IBM 355 Disk Storage Unit)
- Sixty 10-digit words of magnetic core memory at addresses 9000 to 9059; a small fast memory (this device gave a memory access time of 96µs, a 26-fold raw improvement relative to the rotating drum), needed for a tape and disk I/O buffer
- Three four-digit index registers at addresses 8005 to 8007; drum addresses were indexed by adding 2000, 4000 or 6000 to them, core addresses were indexed by adding 0200, 0400 or 0600 to them. If the system had the 4000 word drum then indexing was by adding 4000 to the first address for index register A, adding 4000 to the second address for index register B, and by adding 4000 to each of the two addresses for index register C (the indexing for 4000-word systems only applied to the first address). The 4000-word systems required transistorized read/write circuitry for the drum memory and were available before 1963.
- Floating point – arithmetic instructions supported an eight-digit mantissa and two-digit characteristic (offset exponent) – MMMMMMMMCC, providing a range of ±0.00000001E-50 to ±0.99999999E+49
The 650 instructions consisted of a two-digit operation code, a four-digit data address and the four-digit address of the next instruction. The sign was ignored. The base machine had 44 operation codes. Additional operation codes were provided for options, such as floating point, core storage, index registers and additional I/O devices. With all options installed, there were 97 operation codes.
The Table lookup (TLU) instruction could high-equal compare a referenced 10-digit word with 48 consecutive words on the same drum band in one 5ms revolution and then switch to the next band in time for the next 48 words. This feat was about one-third the speed of a one-thousand times faster binary machine in 1963 (1500 microseconds on the IBM 7040 to 5000 microseconds on the 650) for looking up 46 entries as long as both were programmed in assembler.
The Read (RD) instruction read an 80 column card of numeric data into ten memory words; the distribution of digits to words determined by the card reader's control panel wiring. When used with the 533 Reader Punch unit's Alphabetic device, a combination of numeric and alphanumeric columns (maximum of 30 alphanumeric columns) could be read. An expansion feature allowed more alphanumeric columns but certainly not over 50, as only ten words (five characters per word) were stored on the drum by a card read operation.
The base machine operation codes were:
|17||AABL||Add absolute to lower accumulator|
|15||AL||Add to lower accumulator|
|10||AU||Add to upper accumulator|
|45||BRNZ||Branch on accumulator non-zero|
|46||BRMIN||Branch on minus accumulator|
|44||BRNZU||Branch on non-zero in upper accumulator|
|47||BROV||Branch on overflow|
|90-99||BRD||Branch on 8 in distributor positions 1-10 **|
|64||DIVRU||Divide and reset upper accumulator|
|71||PCH||Punch a card|
|70||RD||Read a card|
|67||RAABL||Reset accumulator and add absolute to lower accumulator|
|65||RAL||Reset accumulator and add to lower accumulator|
|60||RAU||Reset accumulator and add to upper accumulator|
|68||RSABL||Reset accumulator and subtract absolute from lower accumulator|
|66||RSL||Reset accumulator and subtract from lower accumulator|
|61||RSU||Reset accumulator and subtract from upper accumulator|
|35||SLT||Shift accumulator left|
|36||SCT||Shift accumulator left and count ***|
|30||SRT||Shift accumulator right|
|31||SRD||Shift accumulator right and round accumulator|
|01||STOP||Stop if console switch is set to stop, otherwise continue as a NO-OP|
|24||STD||Store distributor into memory|
|22||STDA||Store lower accumulator data address into distributor
Then store distributor into memory
|23||STIA||Store lower accumulator instruction address into distributor
Then store distributor into memory
|20||STL||Store lower accumulator into memory|
|21||STU||Store upper accumulator into memory *|
|18||SABL||Subtract absolute from lower accumulator|
|16||SL||Subtract from lower accumulator|
|11||SU||Subtract from upper accumulator|
- * Value stored takes sign of accumulator, except after a divide operation; then sign of remainder is stored.
- ** Used to allow 533 control panel to signal CPU.
- *** Counts high-order zeros in upper accumulator
This one-card program, taken from the 650 Programming Bulletin 5, IBM, 1956, 22-6314-0, will set most of the drum storage to minus zeros. The program includes examples of instructions being executed from the console switches and from an accumulator.
To begin, a load card is keypunched with 80 consecutive digits (the 2nd column below) so that, when read, drum locations 0001 through 0008 contents will be as shown.
0001 0000010000 0002 0000000000- 0003 1000018003 0004 6100080007 0005 2400008003 0006 0100008000 0007 6900060005 0008 2019990003
The console digit switches (address 8000) are manually set to a Read instruction with data address 0004.
loc- op|data|next ation |addr|instruction | |addr
8000 RD 70 0004 xxxx Read load card into 1st band read area
Each drum band has a read area; these read areas are in locations 0001-0010, 0051-0060, 0101-0110 and so on. Any address in a band can be used to identify that band for a read instruction; the address 0004 identifies the 1st band. Execution begins then, from the console with the reading of the 8 words on the load card into locations 0001-0008 of the 1st memory band. In the case of reading a load card, the "next instruction address" is taken from the data address field, not the next instruction address field (shown above as xxxx). Thus execution continues at 0004
0004 RSU 61 0008 0007 Reset entire accumulator, subtract into upper (8003) the value 2019990003 0007 LD 69 0006 0005 Load distributor with 0100008000 0005 STD 24 0000 8003 Store distributor in location 0000, next instruction is in 8003 (the upper accumulator) Note: the moving of data or instructions from one drum location to another requires two instructions: LD, STD.
Now a two instruction loop executes:
8003 STL 20 1999 0003 Store lower accumulator (that accumulator was reset to 0- by the RSU instruction above) The "1999" data address is decremented, below, on each iteration. This instruction was placed in the upper accumulator by the RSU instruction above. Note: this instruction, now in the upper accumulator, will be decremented and then executed again while still in the accumulator.
0003 AU 10 0001 8003 Decrement data address of the instruction in the accumulator by 1 (by adding 10000 to a negative number)
The STL's data address will, eventually, be decremented to 0003, and the AU ... instruction at 0003 will be overwritten with zeros. When that occurs (the STL's next instruction address remains 0003) execution continues as follows:
0003 NOOP 00 0000 0000 No-operation instruction, next instruction address is 0000 0000 HALT 01 0000 8000 Halt, next instruction address is the console (this Halt instruction was stored in 0000 by the STD instruction above)
In computing culture
- Complete Floating Decimal Interpretive System for the IBM 650 Magnetic Drum Calculator (aka. BLIS — the Bell Lab Interpretive System)
- FOR TRANSIT — A version of Fortran which compiled to IT which in turn was compiled to SOAP
- GATE — A simple compiler with one character variable names
- Internal Translator (IT) — A compiler
- IPL — The first list processing language. The best-known version was IPL-V.
- Revised Unified New Compiler IT Basic Language Extended (RUNCIBLE)
- SPACE (Simplified Programming Anyone Can Enjoy) — A business-oriented two-step compiler through SOAP
- Symbolic Optimal Assembly Program (SOAP) — An assembler
- Synthetic Programming System for Commercial Applications 
- Technical Assembly System (TASS) — A macro assembler.
- History of IBM#1946–1959: Postwar recovery, rise of business computing, space exploration, the Cold War
- UNIVAC Solid State announced by Sperry Rand in December 1958 as a response to the IBM 650. In June 1959, Remington Rand announced that it had written an IBM 650 emulator program to ease conversion.
Notes and references
- IBM Archives: IBM 650 installation with IBM 727 Magnetic Tape Unit and IBM 355 Disk Storage
- IBM Archives: IBM 650 Assembly at Endicott plant
- IBM 650 RAMAC announcement press release
- Pugh, Emerson W. (1995). Building IBM: Shaping an Industry and Its Technology. MIT Press. p. 182. ISBN 978-0-262-16147-3.
- IBM Archives: 650 Customers
- Gray, Wayne D. (2007). Integrated Models of Cognition Systems. New York: Oxford University Press. p. 36. ISBN 978-0-19-518919-3.
- Bashe, Charles J.; Johnson, Lyle R; Palmer, John H.; Pugh, Emerson W. (1986). IBM's Early Computers. MIT. p. 473. ISBN 0-262-02225-7.
- IBM Archives: 650 Components
- IBM Archives: IBM 650 Console Unit
- IBM Archives: IBM 655 Power Unit
- Other IBM names for the 533 included Input-Output Unit and Read-Punch Unit.
- IBM Archives: IBM 533 Card Read Punch
- IBM Archives: IBM 537 Card Read Punch
- IBM Archives: IBM 355 Disk Storage
- IBM Archives: IBM 407 accounting machine
- IBM Archives: IBM 652 Control Unit
- IBM Archives: IBM 653 Auxiliary Unit
- IBM Archives: IBM 838 Inquiry Station
- IBM Archives: IBM 650 Magnetic Drum
- IBM Archives: IBM 650 Model 4 announcement
- IBM 650 CPU Extensions
- IBM 650 Magnetic Drum Data-Processing Machine: Manual of Operation. IBM. 1956. 22-6060-1.
- A 12 punch can be used to identify cards as load cards. Load cards are directly read into words 1-8 of the specified storage band
- IBM Reference Manual: Floating-Decimal Interpretive System for the IBM 650 (PDF). IBM. 1956, 1959. pp. 63, xxi. 28-4024.
This is a reprint of IBM 650 Technical Newsletter No. 11, March 1956, form 31-6822Check date values in:
|date=(help) . This reference manual contains the following report, noting that In its external characteristics, the interpretive system described in this report owes much to the IBM Speedcoding System for the 701. Wolontis, V.M. Complete Floating Decimal Interpretive System for the IBM 650 Magnetic Drum Calculator. Bell Laboratories, Inc, Murray Hill, New Jersey.
- IBM (1959). FOR TRANSIT Automatic Coding System for the IBM 650 (PDF). 28-4028.
- IBM (1960). FORTRAN Automatic Coding System for the IBM 650 (PDF). 29-4047.
- Perlis, A.J.; Smith, J.W.; VanZoeren, H.R. (1958-04-18). Internal Translator; IT, A Compiler for the 650 (PDF). 650 Library Program 2.1.001.
- Donald Knuth published the flowchart of the compiler in 1959;Knuth, D. E. (1959). "RUNCIBLE—algebraic translation on a limited computer". Communications of the ACM 2: 18–21. doi:10.1145/368481.368507. ; this was his first academic paper.
- IBM (1957). SOAP II for the IBM 650 (PDF). C24-4000-0.
- 650 Programming Bulletin 2. IBM. 1956. p. 40. 22-6294-0.
The Interpretive routine described here is a fixed decimal three address system that provides for mathematical, logical, and input-output operations. The logic for this system was obtained from the Complete Floating Decimal Interpretive System for the 650 that was developed by the Bell Laboratories, Murray Hill, New Jersey.
- Unisys History Newsletter, Volume 1.2 December 1992 (revised 1999) by George Gray
- Andree, Richard V. (1958). Programming the IBM 650 magnetic drum computer and data-processing machine.
- IBM (1955). IBM 650 magnetic drum data-processing machine manual of operation. (PDF). 22-6060.
- IBM (1955). IBM Presents the 650 Magnetic Drum Data Processing Machine (PDF). 32-6770.
- Knuth, Donald E. (January–March 1986). "The IBM 650: An Appreciation from the Field". IEEE Annals of the History of Computing 8 (1): 50–55. doi:10.1109/MAHC.1986.10010.
|Wikimedia Commons has media related to IBM 650.|
- Bitsavers.org: IBM 650 documents (PDF files)
- Columbia University: The IBM 650 at Columbia University
- IBM Archives The IBM 650: Workhorse of Modern Industry Includes a chronology, technical specifications, photographs, representative customers, and applications the 650 was used for.
- Video clip of IBM 650 and RAMAC in operation, alternate version
- Weik, Martin H. (March 1961). A Third Survey of Domestic Electronic Digital Computing Systems. Ballistic Research Laboratories (BRL). Report No. 1115. Includes about 40 pages of IBM 650 survey detail: customers, applications, specifications, and costs.