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IP-XACT is an XML format that defines and describes electronic components and their designs. IP-XACT was created by the SPIRIT Consortium as a standard to enable automated configuration and integration through tools.
The goals of the standard are
- to ensure delivery of compatible component descriptions from multiple component vendors,
- to enable exchanging complex component libraries between electronic design automation (EDA) tools for SoC design (design environments),
- to describe configurable components using metadata, and
- to enable the provision of EDA vendor-neutral scripts for component creation and configuration (generators, configurators).
- ARM Socrates System IP Tooling
- Magillem, Industrial IP-XACT Solution for a complete RTL and ESL front end capture
- Scineric Workspace IP-XACT based IDE
- Kactus2 open source IP-XACT design environment
- Complete IP-XACT ( 1685-2009 ) solution free, available in GUI and Tcl command & EDAutils Baya- SoC Platform Assembly Tool
- Atrenta gensys assembly
- Xilinx's Vivado tool supports IP-XACT component by way of a Xilinx Core Instance (XCI) files. The XCI file represents an IP-XACT component XML file that records the values of project options, customization parameters, and port parameters used to create the IP. Most of the IP in the Vivado IP catalog uses the IP-XACT standard format (based on IEEE Std 1685-2009).
- 1685-2009 – IEEE Standard for IP-XACT, Standard Structure for Packaging, Integrating, and Reusing IP within Tools Flows. 2010. doi:10.1109/IEEESTD.2010.5417309. ISBN 978-0-7381-6160-0.
- IP Integration of a Complex ARM IP-based System
- Increasing Hardware/Software Interface (Register Management) Quality Through Standards
- SPIRIT IP-XACT Controlled ESL Design Tool Applied to a Network-on-Chip Platform
- SPRINT Industrial IP Integration Flows based on IP-XACT Standards
- Schemas of The SPIRIT Consortium
- The SPIRIT Consortium - Reference BusDefs
- SPIRIT IP-XACT Bus Definitions for AMBA
- Berman, V.: Standards: The P1685 IP-XACT IP Metadata Standard, in: Design & Test of Computers, IEEE, April 2006, Volume 23, Issue 4, pp. 316–317