Intel 8008
An Intel 8008 Microprocessor |
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| Produced | From mid 1972 to 1983[1] |
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| Common manufacturer(s) |
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| Max. CPU clock rate | 0.2 MHz to 0.8 MHz |
| Min. feature size | 10μm |
| Instruction set | 8008 |
| Application | Dumb terminals, general calculators, bottling machines, data/character manipulation |
| Predecessor | Intel 4004 |
| Successor | Intel 8080 |
| Package(s) |
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The Intel 8008 ("eight-thousand-eight") was an early byte-oriented microprocessor designed and manufactured by Intel and introduced in April 1972. It was an 8-bit CPU with an external 14-bit address bus that could address 16KB of memory. Originally known as the 1201, the chip was commissioned by Computer Terminal Corporation (CTC) to implement an instruction set of their design for their Datapoint 2200 programmable terminal. As the chip was delayed and did not meet CTC's performance goals, the 2200 ended up using CTC's own TTL based CPU instead. An agreement permitted Intel to market the chip to other customers after Seiko expressed an interest in using it for a calculator.
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History [edit]
CTC formed in San Antonio in 1968 under the direction of Austin O. "Gus" Roche and Phil Ray, both NASA engineers. Roche, in particular, was primarily interested in producing a desktop computer. However, given the immaturity of the market, the company's business plan mentioned only a Teletype Model 33 ASR replacement, which shipped as the Datapoint 3300. The case, designed by John "Jack" Frassanito, was deliberately designed to fit in the same space as an IBM Selectric typewriter, and used a video screen shaped to be the same aspect ratio as an IBM punched card.[2] Although commercially successful, the 3300 had ongoing heat problems due to the amount of circuitry packed into such a small space.
In order to address the heating and other issues, a re-design started that featured the CPU part of the internal circuitry re-implemented on a single chip. Looking for a company able to produce their chip design, Roche turned to Intel, then primarily a vendor of memory chips.[2] Roche met with Bob Noyce, who expressed concern with the concept; Frassanito recalls that "Noyce said it was an intriguing idea, and that Intel could do it, but it would be a dumb move. He said that if you have a computer chip, you can only sell one chip per computer, while with memory, you can sell hundreds of chips per computer."[2] Another major concern was that Intel's existing customer base purchased their memory chips for use with their own processor designs; if Intel introduced their own processor, they might be seen as a competitor, and their customers might look elsewhere for memory. Nevertheless, Noyce agreed to a $50,000 development contract in early 1970. Texas Instruments (TI) was also brought in as a second supplier.
TI was able to make samples of the 1201 based on Intel drawings, but these proved to be buggy and were rejected. Intel's own versions were delayed. CTC decided to re-implement the new version of the terminal using discrete TTL instead of waiting for a single chip CPU. The new system was released as the Datapoint 2200 in the spring 1970, with their first sale to General Mills on May 25, 1970.[2] CTC paused development of the 1201 after the 2200 was released, as it was no longer needed. Six months later, Seiko approached Intel expressing an interest in using the 1201 in a scientific calculator, likely after seeing the success of the simpler Intel 4004 used by Busicom in their business calculators. A small re-design followed, under the leadership of Federico Faggin, the designer of the 4004, now project leader of the 1201, expanding from a 16-pin to 18-pin design, and the new 1201 was delivered to CTC in late 1971.[2]
By that point CTC had once again moved on, this time to the Datapoint 2200 II, which was faster and included a hard drive. The 1201 was no longer powerful enough for the new model. CTC voted to end their involvement with the 1201, leaving the design's intellectual property to Intel instead of paying the $50,000 contract. Intel renamed it the 8008, and put it in their catalog in April 1972 priced at $120. Intel's initial worries about their existing customer base leaving them proved unfounded, and the 8008 went on to be a commercially successful design. This was followed by the Intel 8080, and then the hugely successful Intel x86 family.[2]
One of the first teams to build a complete system around the 8008 was Bill Pentz' team at California State University, Sacramento. The Sac State 8008 was possibly the first true microcomputer, with a disk operating system built with IBM Basic assembly language in PROM all driving a color display, hard drive, keyboard, modem, audio/paper tape reader and printer.[2] The project started in the spring of 1972 and with key help from Tektronix the system was fully functional a year later. Bill assisted Intel with the MCS-8 kit and provided key input to the Intel 8080 instruction set which helped make it useful for the industry and hobbyists.
In the UK, a team at S. E. Laboratories Engineering (EMI) led by Tom Spink in 1972 built a microcomputer based on a pre-release sample of the 8008. Joe Hardman extended the chip with an external stack. This, among other things, gave it power-fail save and recovery. Joe also developed a direct screen printer. The operating system was written using a meta-assembler developed by L. Crawford and J. Parnell for a Digital Equipment Corporation PDP-11.[3] The operating system was burnt into a PROM. It was interrupt-driven, queued, and based on a fixed page size for programs and data. An operational prototype was prepared for management, who decided not to continue with the project.
The 8008 was the CPU for the very first commercial personal computers, the (French non-kit) Micral and the (US kit) SCELBI.
Design [edit]
Implemented in 10 μm silicon-gate enhancement load PMOS; initial versions of the 8008 could work at clock frequencies up to 0.5 MHz, this was later increased in the 8008-1 to a specified maximum of 0.8 MHz. Instructions took between 5 and 11 T-states where each T-state was 2 clock cycles.[4] Register-register loads and ALU operations took 5T (20 μs at 0.5 MHz), register-memory 8T (32 μs), while calls and jumps (when taken) took 11 T-states (44 μs).[5] The 8008 was a little slower in terms of instructions per second (36,000 to 80,000 at 0.8 MHz) than the 4-bit Intel 4004 and Intel 4040,[6] but the fact that the 8008 processed data eight bits at a time and could access significantly more RAM still gave it a significant speed advantage in most applications. The 8008 had 3,500 transistors.[7]
The subsequent Intel 8080 and 8085 CPUs were assembly-language (not binary) compatible with the 8008 and also heavily based on the same basic internal design. The original x86 processor, the 8086, was in turn a non-strict extension of the 8080, therefore loosely resembling the original Datapoint 2200 design as well. This means that each 8008 instruction has an equivalent not only in the larger instruction set of the 8080 (and 8085, Z80 etc.) but also, in most cases, in the large 32-bit based instruction set of a modern x86 processor (although the encodings are different in all three).
The chip (limited by its 18-pin DIP packaging) had a single 8-bit bus and required a significant amount of external support logic. For example, the 14-bit address, which could access "16 K x 8 bits of memory",[4] needed to be latched by some of this logic into an external Memory Address Register (MAR). The 8008 could access 8 input ports and 24 output ports.
For controller and CRT terminal use, this was an acceptable design, but it was rather cumbersome to use for most other tasks, at least compared to the next generations of microprocessors. A few early computer designs were based on it, but most would use the later and greatly improved Intel 8080 instead.
The 8008 family is also referred to as the MCS-8.
Designers [edit]
- CTC (Instruction set and architecture): Victor Poor and Harry Pyle.
- Intel (Implementation in silicon):
- Ted Hoff and Stan Mazor and Larry Potter (IBM Chief Scientist of IBM) proposed a single-chip implementation of the CTC architecture, using RAM register memory rather than shift register memory, and also added a few instructions and interrupt facility. The 8008 (originally called 1201) chip design started before the 4004 development. Hoff and Mazor, however, could not and did not develop a "silicon design" because they were neither chip designers nor process developers and furthermore the necessary design methodology , under development by Federico Faggin for the 4004, was not yet available.[citation needed]
- Federico Faggin, having finished the design of the 4004, became leader of the project from January 1971 until its successful completion in April 1972, after it had been suspended – for lack of progress – for about seven months.
- Hal Feeney project engineer did the detailed logic design, circuit design, and physical layout under Faggin's supervision, employing the same design methodology that Faggin had originally developed for the Intel 4004 microprocessor, and utilizing the basic circuits he had developed for the 4004. Note his combined HF logo on the chip about half way between the D5 and D6 bonding pads.
External links [edit]
- MCS-8 User Manual with 8008 data sheet (1972)
- Computer World Forgotten PC history: The true origins of the personal computer
- The Intel 8008 support page unofficial
- The DigiBarn Computer Museum's page on Bill Pentz' Sacramento State machine, a full microcomputer built around the 8008
References [edit]
- ^ CPU History – The CPU Museum – Life Cycle of the CPU
- ^ a b c d e f Lamont Wood, "Forgotten PC history: The true origins of the personal computer", Computerworld, August 8, 2008
- ^ Brunel University, 1974. Master of Technology dissertation, L. R. Crawford
- ^ a b "MCS-8 Micro Computer Set Users Manual" (PDF). Intel Corporation. 1972. Retrieved December 4, 2010.
- ^ "Intel 8008 Opcodes". Retrieved December 4, 2010.
- ^ "Intel 8008 (i8008) microprocessor family". CPU World. 2003–2010. Retrieved December 4, 2010.
- ^ [1][dead link]
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