Intel 8061

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The Intel 8061 microcontroller is most notable for its use in the Ford EEC-IV automotive engine control unit. A close relative of the 8096, the Intel 8061 is second-sourced by Toshiba (under the model number 6127 and 6126) and Motorola (now Freescale Semiconductor).

Introduction[edit]

The MCS-96 family originated as a commercial derivative of the Intel 8061, the first processor in the Ford EEC-IV engine controller family. Differences between the 8061 and the 8096 include the memory interface bus, the 8061's M-Bus being a 'burst-mode' bus requiring a tracking program counter in the memory devices. There were also considerable differences in the I/O peripherals of the two parts - the 8061 had 8 HSI (pulse-measurement) inputs, 10 HSO (pulse-generation) outputs entirely separated from the HSI pins, and a non-sampling 10-bit ADC with more channels than the 8096 had. Many differences between the EEC-IV and the 8096 resulted from an effort to share pins to reduce I/O pin count in favor of using the pins for a more conventional memory interface bus.

The 8061 and its derivatives were used in almost all Ford automobiles built from 1983 through the end of the 20'th century. This processor controlled fuel mixture and injection timing, spark advance (often in conjunction with a separate spark module), exhaust gas recirculation, and other engine functions.

M-Bus[edit]

The 8061 had an interruptible-burst-mode 11-wire 8-bit memory interface bus called the M-Bus. This bus required a program counter and a data address register in each memory device. Each chip reset or branch instruction would update the program counter in the memory devices, after which instruction stream data would be read sequentially. The instruction stream could be interrupted to read or write data bytes and words using the memory's data address register while retaining the memory's program counter copy—allowing resumption of reading the instruction stream without having to re-send a program address after each data access.

Address map[edit]

The 8061 had a 240-byte internal register file, from address 0010H to 00FFH. I/O addresses were from 0002H to 000FH. Throughout the 8061 family, address 0000H was reserved for a constant ZERO register. This permitted use of relative addressing to access absolute addresses. The stack pointer was at 00010H. 8061 could address 64K of memory. Reset was to 2000H. Interrupt vectors were at 2010H.

Process, package[edit]

The 8061 was built in a 3-micrometre N-MOS silicon-gate process. Plastic 68-pin flatpacks, ceramic packages, and 40-pin DIP packages were used, depending on the I/O pin-count requirements of a particular module design.

Derivatives[edit]

Ford created the Ford Microelectronics facility in Colorado Springs in 1982 to propagate the EEC-IV family, develop other custom circuits for use in automobiles, and to explore the Gallium Arsenide integrated circuit market. Parts in that family included the 8063, which never reached production. The family also included the 8065, produced in high volumes, which incorporated a memory controller allowing it to address a 1-megabyte memory, considerably greater than the 64K of the 8061 and 8096.

The 8063, 8065 and later EPIC were CMOS derivatives capable of reduced power consumption.

The 8065 had an enhanced instruction set, additional register space, and a much-enhanced I/O. As a result, the 8065 had a register file from address 0020H to 03FFH, addressable in 4 banks. I/O addresses were from 0002H to 001FH. The stack pointer was at 00020H.

HSI[edit]

The 8061 had an 8-channel event-capture system for measuring and timing pulsed inputs. A 16-bit timer value was captured in a FIFO along with the new state of all 8 pins whenever a transition was detected on an enabled pin. The FIFO was implemented in a small dynamic RAM.

The HSI was used, for example, for recording times of crankshaft-position-sensor events, which were used for determining engine speed.

HSO[edit]

The 8061 had a 10-channel pulse-generator output system for generating timed outputs. This essentially had a small content-addressable memory (CAM) that compared event times with the same 16-bit timer used for the HSI system. Each event time was written to CAM along with a command. When a match of a CAM location with the timer was found, the event was executed and the CAM location returned to an empty pool. The CAM was simulated with dynamic RAM and a comparator. The HSO was used for a variety of purposes including fuel injection pulse timing.

ADC[edit]

The 8061 and its derivatives had a multichannel analog-to-digital converter on the processor chip. This was used for such purposes as sensing engine temperature and throttle angle, and for reading the exhaust-gas oxygen sensor.

Interrupts[edit]

The 8061 had an 8-channel vectored priority interrupt system. The later 8065 provided 40 channels, of which 32 were tied into the HSI/HSO event system.

Serial Port[edit]

Various members of the 8061 family had a custom serial port on-chip. This was intended as a port expander and not as a general-purpose UART

Companion Memory[edit]

The 8061 was used with a family of other devices, including the 8361 – a companion memory having ROM and some RAM. In later modules, one-time-programmable (OTP) EPROM memory was substituted for the original mask-programmed memory – this greatly simplified logistics given the wide variety of ROM codes required in each model year.

External links[edit]