Intel HD Graphics
|Direct3D support||Direct3D 11.1
Shader Model 5.0
|OpenCL support||OpenCL 1.2|
|OpenGL support||OpenGL 4.2 on Windows
OpenGL 4.1 on Mac OS
OpenGL 3.3 on Linux
Before the introduction of Intel HD Graphics, Intel integrated graphics were built into the motherboard's northbridge, as part of the Intel's Hub Architecture. This included Intel Extreme Graphics and the Intel Graphics Media Accelerator. As part of the Platform Controller Hub (PCH) design, the northbridge was eliminated and graphics processing was moved to the same die with the central processing unit (CPU).
The previous Intel integrated graphics solution, Intel GMA, had a reputation of lacking performance and features, and therefore was not considered to be a good choice for more demanding graphics applications, such as 3D gaming. The performance increases brought by Intel's HD Graphics made the products competitive with integrated graphics adapters made by its rivals, Nvidia and ATI/AMD. Intel HD Graphics, featuring minimal power consumption that is important in laptops, was capable enough that PC manufacturers often stopped offering discrete graphics options in their low-end and mid-range laptop lines.
In January 2011, the Sandy Bridge processors were released, introducing the "second generation" HD Graphics:
- HD Graphics1 (6 execution units)
- HD Graphics 2000 (6 execution units and additional features3)
- HD Graphics 3000 (12 execution units and additional features3)
- HD Graphics2 (6 execution units)
- HD Graphics 2500 (6 execution units and additional features3)
- HD Graphics 4000 (16 execution units and additional features3)
1 Celeron and Pentium have Intel HD, while Core i3 and above have either HD 2000 or HD 3000.
2 Celeron and Pentium have Intel HD, while Core i3 and above have either HD 2500 or HD 4000.
HD Graphics on some low power mobile CPUs have limited video decoding, while all desktop CPUs do not have these limitations.
On September 12, 2012, Haswell CPUs were announced, with four models of integrated GPUs:
- HD Graphics (GT1, 10 execution units)
- HD Graphics 4200, 4400, 4600, P4600, P4700 (GT2, 20 execution units)
- HD Graphics 5000 (GT3, 40 execution units, twice the performance of HD4xxx for compute-limited workloads, 15 W TDP SKUs, initially available only to Apple)
- Iris Graphics 5100 (the same as HD Graphics 5000, 28 W TDP SKUs)
- Iris Pro Graphics 5200 (GT3e, the same as GT3 but with addition of a large 128 MB embedded DRAM (eDRAM) cache to improve performance of bandwidth-limited workloads)
The 128 MB of eDRAM is on the same package as the CPU, but in a separate die manufactured in a different process. Intel refers to this as a Level 4 cache that is available to both CPU and GPU, naming it Crystal Well. Linux support for this eDRAM is expected in kernel version 3.12, by making the
drm/i915 driver aware and capable of using it.
Beginning with Sandy Bridge, the graphics processors include a form of digital copy protection and Digital Restrictions Management (DRM) called Intel Insider, which allows decryption of protected media within the processor. Previously there was a similar technology called Protected Audio Video Path (PAVP).
Three active displays
HD2500 and HD4000 GPUs in Ivy Bridge CPUs are advertised as supporting three active monitors, but many users have found that this does not work for them due to the chipsets only supporting two active monitors in many common configurations. The reason for this is that the chipsets only include two phase-locked loops (PLLs); a PLL generates a pixel clock at a certain frequency which is used to sync the timings of data being transferred between the GPU and displays.
Therefore, three simultaneously active monitors can only be achieved by a hardware configuration that requires only two unique pixel clocks, such as:
- Using 2 or 3 active DisplayPort connections. DisplayPort requires only a single pixel clock for all active connections, regardless of how many there are (this is not the case for non-active connections, which would require an extra pixel clock for each connection).
- By using two non-DisplayPort connections of the same connection type (i.e. two HDMI connections) and the same clock frequency (i.e. connected to two identical monitors at the same resolution), so that a single unique pixel clock can be shared between both connections.
- Using the Embedded DisplayPort on a mobile CPU along with any two other outputs.
- Video card
- Comparison of Intel graphics processing units
- Free and open-source device drivers: graphics
- "Supported Graphics APIs and Features". Intel.
- "Release Notes Driver version: 220.127.116.11.3345" (PDF). 2013-11-20. Retrieved 2013-11-26.
- "Mac OS X 10.9 Core Profile OpenGL Info". 2013-11-09.
- "OpenGL 3.3 Support Lands In Mesa! Possible Mesa 11.0".
- "Intel's Official Ivy Bridge CPU Announcement Finally Live".
- Michael Larabel (2013-09-02). "Linux 3.12 Enables Haswell's Iris eLLC Cache Support". phoronix.com. Retrieved 2013-10-25.
- "drm/i915: Use eLLC/LLC by default when available". kernel.org. 2013-07-16. Retrieved 2013-10-25.
- "drm/i915: Use Write-Through cacheing for the display plane on Iris". kernel.org. 2013-08-22. Retrieved 2013-10-25.
- Knupffer, Nick. "Intel Insider – What Is It? (IS it DRM? And yes it delivers top quality movies to your PC)". Retrieved 2011-02-02.
- LG Nilsson (2012-03-12). "Most desktop Ivy Bridge systems won't support three displays". VRZone. "Despite the fact that Intel has been banging its drums about support for up to three displays on the upcoming 7-series motherboards in combination with a shiny new Ivy Bridge based CPU, this isn't likely to be the case. The simple reason behind this is that very few, if any motherboards will sport a pair of DisplayPort connectors."
- David Galus (2013-02). "Migration to New Display Technologies on Intel Embedded Platforms". Intel. "The Intel® 7 Series Chipset based platform allows for the support of up to three concurrent displays with independent or replicated content. However, this comes with the requirement that either one of the displays is eDP running off the CPU or two DP interfaces are being used off the PCH. When configuring the 2 DP interfaces from the PCH, one may be an eDP if using Port D. This limitation exists because the 7 Series Intel PCH contains only two display PLLs (the CPU has one display PLL also) which will control the clocking for the respective displays. All display types other than DP have an external variable clock frequency associated with the display resolution that is being used. The DP interface has an embedded clocking scheme that is semi- variable, either at 162 or 270 MHz depending on the bandwidth required. Therefore, Intel only allows sharing of a display PLL with DP related interfaces."
- Michael Larabel (2011-10-06). "Details On Intel Ivy Bridge Triple Monitor Support". "A limitation of this triple monitor support for Ivy Bridge is that two of the pipes need to share a PLL. Ivy Bridge has three planes, three pipes, three transcoders, and three FDI (Flexible Display Interface) interfaces for this triple monitor support, but there's only two pipe PLLs. This means that two of the three outputs need to have the same connection type and same timings. However, most people in a triple monitor environment will have at least two — if not all three — of the monitors be identical and configured the same, so this shouldn't be a terribly huge issue."
- "Z87E-ITX". ASRock. "This motherboard supports Triple Monitor. You may choose up to three display interfaces to connect monitors and use them simultaneously."
- "H87I-PLUS". Asus. "Connect up to three independent monitors at once using video outputs such as DisplayPort, Mini DisplayPort, HDMI, DVI, or VGA. Choose your outputs and set displays to either mirror mode or collage mode."
- Intel® Graphics Performance Analyzers 2013 R2
- Intel HD Graphics 4000 and Intel HD Graphics 2500 Review
- Intel HD Graphics 3000 and Intel HD Graphics 2000 Review