Interrupt vector table
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An interrupt vector table, a concept common across various processor architectures, is a table of interrupt vectors that associates an interrupt handler with an interrupt request in a machine specific way. A dispatch table is one method of implementing an interrupt vector table.
An interrupt vector table is used in all 3 of the 3 most popular methods of finding the starting address of the interrupt service routine:
The "predefined" method loads the program counter (PC) directly with the address of some entry inside the interrupt vector table. The jump table itself contains executable code. While in principle an extremely short interrupt handler could be stored entirely inside the interrupt vector table, in practice the code at each and every entry is "JMP address" where the address is the address of the interrupt service routine (ISR) for that interrupt. The Atmel AVR and all 8051 and Microchip microcontrollers use the predefined approach.
The "fetch" method loads the PC indirectly, using the address of some entry inside the interrupt vector table to pull an address out of that table, and then loading the PC with that address. Each and every entry of is the address of an interrupt service routine. All Motorola/Freescale microcontrollers use the fetch method.
The "interrupt acknowledge" method, the external device gives the CPU an interrupt handler number. The interrupt acknowledge method is used by the Intel Pentium and many older microprocessors.
- Interrupt Descriptor Table (x86 Architecture implementation)
- "dsPIC33F Family Reference Manual" section 29.1.1 Interrupt Vector Table
- "AVR Libc User Manual" section: Introduction to avr-libc's interrupt handling
- Roger L. Traylor. "Interrupts: AVR interrupt servicing"
- Gary Hill. "Atmel AVR Interrupt and Timing Subsystems: ATMEGA328P interrupt vector table"
- Huang, Han-Wat (2005). Pic Microcontroller: An Introduction to Software and Hardware Interfacing. Cengage Learning. p. 247. ISBN 978-1-4018-3967-3. Retrieved 22 April 2013.
- Intel® Architecture Software Developer's Manual, Volume 3: System Programming Guide
- Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A:System Programming Guide, Part 1 (see CHAPTER 6, INTERRUPT AND EXCEPTION HANDLING and CHAPTER 10, ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER)]
- Motorola M68000 Exception and Vector Table