List of libvirt feature policies

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The following is a list of libvirt feature policies

NAME architecture developed by primary purpose
3dnow x86 AMD 3D graphics
3dnowext x86 AMD 3D graphics
3dnowprefetch x86 AMD 3D graphics
abm x86 AMD implementation of leading zero count in registers
acpi Intel Power Control
adx
aes x86 Intel and AMD hardware implementation of AES for cryptography
apic
avx x86 Intel and AMD Floating point calculations
avx2 x86 Intel and AMD Floating point calculations
bmi1 x86 Intel cryptography
bmi2 x86 Intel cryptography
cid
clflush
cmov
cmp legacy
cr8legacy
cvt16
cx16
cx8
dca x86 Intel direct cache access
de
ds
ds cpl x86 Intel CPL Qualified Debug Store
dtes64
erms
est x86 Intel dynamic frequency scaling
extapic
f16c
fma x86 AMD arithmetic extension
fma4 x86 AMD arithmetic extension with 4 operands
fpu x86 Intel obsolete on chip floating point unit
fsgsbase
fxsr
fxsr opt
hle
ht
hypervisor
ia64
ibs
invpcid
lahf lm
lm x86 AMD part of the move to x64 allows larger memory areas to be accessed.
lwp x86 AMD allows a lightweight method for userland programs to find out the resources being dedicated to themselves.
mca
mce x86 Intel Reports hardware errors to kernel
misalignsse x86 Reports hardware errors to kernel such as ram failures
mmx x86 Intel Legacy multimedia extension
mmxext
monitor
movbe
msr
mtrr
nodeid msr
nx Harvard architecture and x86 AMD reserves blocks of address as never executable for security purposes
osvw x86 AMD OS Visible Workaround
osxsave
pae
pat x86 Intel memory paging manipulation
pbe
pcid x86 Intel cache management [1]
pclmuldq
pdcm
pdpe1gb gigbyte page size extension
perfctr core
perfctr nb
pge
pn x86 Intel removed from modern CPUs created a unique serial number for the CPU
pni x86 AMD Horizontal register manipulation
popcnt x86 AMD Hamming coding
pse x86 Intel an add-on allow larger page sizes
pse36 x86 Intel work around to allow 32 bit processors to exceed 4GB of RAM
rdrand x86 Intel on chip random number generator
rdseed
rdtscp x86 AMD serilizer option to force a set of instructions to not be executed until another block has been executed.
rtm x86 Intel extension to allow programmer to provide alternative code to be executed if the primary code fails
sep SYSENTER and SYSEXIT instructions
skinit x86 AMD verified startup of secured software
smap
smep
smx x86 Intel permissions implemented in hardward
ss cache snooping
sse
sse2
sse4.1
sse4.2
sse4a
sse3
svm
syscall
tbm
tce
tm x86 Intel obsolete thermal management tool by pausing clock signal
tm2 x86 Intel thermal management tool by manipulating clock frequency
topoext
tsc x86 Counter
tsc-deadline
vme x86 Intel virtual mode extension interrupt management
vmx x86 Intel and AMD virutalization extension
wdt watchdog timer support
x2apic
xop
xsave
xtpr

References[edit]

  1. ^ http://www.realworldtech.com/westmere/.  Missing or empty |title= (help)

http://support.amd.com/us/Processor_TechDocs/43724.pdf