|32 special-purpose registers|
MMIX (pronounced em-mix) is a 64-bit RISC architecture designed by Donald Knuth, with significant contributions by John L. Hennessy (who contributed to the design of the MIPS architecture) and Richard L. Sites (who was an architect of the Alpha architecture). In Knuth’s own words:
|“||MMIX is a computer intended to illustrate machine-level aspects of programming. In my books The Art of Computer Programming, it replaces MIX, the 1960s-style machine that formerly played such a role... I strove to design MMIX so that its machine language would be simple, elegant, and easy to learn. At the same time I was careful to include all of the complexities needed to achieve high performance in practice, so that MMIX could in principle be built and even perhaps be competitive with some of the fastest general-purpose computers in the marketplace.||”|
MMIX is a 64-bit RISC, with 256 64-bit general-purpose registers and 32 64-bit special-purpose registers. MMIX is a big-endian machine with fixed-length 32-bit instructions and a 64-bit virtual address space. The MMIX instruction set comprises 256 opcodes, one of which is reserved for future expansion. MMIX uses IEEE 754 floating-point numbers.
All instructions have an associated mnemonic. For example, instruction #20 (32) is associated with ADD. Most instructions have the symbolic form "OP X,Y,Z", where OP specifies the sort of instruction, X specifies the register used to store the result of the instruction and the rest specify the operands of the instruction. Each of these fields is eight bits wide. For example, ADD $0,$1,3 means "Set $0 to the sum of $1 and 3."
Most instructions can take either immediate values or register contents; thus a single instruction mnemonic may correspond to one of two opcodes.
MMIX programs are typically constructed using the MMIXAL assembly language. The below is a simple MMIXAL program, which prints the string "Hello, world":
LOC #100 % Set the address of the program % initially to 0x100. Main GETA $255,string % Put the address of the string % into register 255. TRAP 0,Fputs,StdOut % Write the string pointed to % by register 255 to the standard output file. TRAP 0,Halt,0 % End process. string BYTE "Hello, world!",#a,0 % String to be printed. % #a is newline, 0 terminates the string.
There are 256 general purpose architectural registers in an MMIX chip, designated by $0 through $255 and 32 special physical architectural registers. Two of the special registers, rL and rG, determine which of the general registers are local and which are global. All registers from $0 ... ([rL] − 1) are local registers. Registers from [rL] ... ([rG] − 1) are "marginal registers" they always return 0 if they are used as a source in an operation. Using a marginal register as the destination of an operation will cause the machine to automatically increase rL to include that register. All registers [rG] ... $255 are called global registers, and are not saved on the register stack.
Local register stack
The local register stack provides each subroutine with its own rL local registers, designated by $0 through $(rL − 1). Whenever a subroutine is called, a number of local registers is pushed down the stack. The arguments of the called subroutine are left in the remaining local registers. When a subroutine finishes it pops the previously pushed registers. Because there are only 256 local physical registers, it may be necessary to store a part of the stack in memory. This is implemented with the special registers rO and rS which record which part of the local register stack is in memory and which part is still in local physical registers. The register stack provides for fast subroutine linkage.
The 32 special physical architectural registers are as follows:
- rB, the bootstrap register (trip)
- When tripping, rB ← $255 and $255 ← rJ. Thus saving rJ in a general register.
- rD, the dividend register
- Unsigned integer divide uses this as the left half of the 128-bit input that is to be divided by the other operand.
- rE, the epsilon register
- Used for floating comparisons with respect to epsilon.
- rH, the himult register
- Used to store the left half of the 128-bit result of unsigned integer multiplication.
- rJ, the return-jump register
- Used to save the address of the next instruction by PUSHes and by POP to return from a PUSH.
- rM, the multiplex mask register
- Used by the multiplex instruction.
- rR, the remainder register
- Is set to the remainder of integer division.
- rBB, the bootstrap register (trap)
- When trapping, rBB ← $255 and $255 ← rJ. Thus saving rJ in a general register
- rC, the cycle counter
- Incremented every cycle.
- rN, the serial number
- A constant identifying this particular MMIX processor.
- rO, the register stack offset
- Used to implement the register stack.
- rS, the register stack pointer
- Used to implement the register stack.
- rI, the interval counter
- Decremented every cycle. Causes an interrupt when zero.
- rT, the trap address register
- Used to store the address of the trip vector.
- rTT, the dynamic trap address register
- Used to store the address of the trap vector.
- rK, the interrupt mask register
- Used to enable and disable specific interrupts.
- rQ, the interrupt request register
- Used to record interrupts as they occur.
- rU, the usage counter
- Used to keep a count of executed instructions.
- rV, the virtual translation register
- Used to translate virtual addresses to physical addresses. Contains the size and number of segments, the root location of the page table and the address space number.
- rG, the global threshold register
- All general registers references with a number greater or equal to rG refer to global registers.
- rL, the local threshold register
- All general registers references with a number smaller than rL refer to local registers.
- rA, the arithmetic status register
- Used to record, enable and disable arithmetic exception like overflow and divide by zero.
- rF, the failure location register
- Used to store the address of the instruction that caused a failure.
- rP, the prediction register
- Used by conditional swap (CSWAP).
- rW, the where-interrupted register (trip)
- Used, when tripping, to store the address of the instruction after the one that was interrupted.
- rX, the execution register (trip)
- Used, when tripping, to store the instruction that was interrupted.
- rY, the Y operand (trip)
- Used, when tripping, to store the Y operand of the interrupted instruction.
- rZ, the Z operand (trip)
- Used, when tripping, to store the Z operand of the interrupted instruction.
- rWW, the where-interrupted register (trap)
- Used, when trapping, to store the address of the instruction after the one that was interrupted.
- rXX, the execution register (trap)
- Used, when trapping, to store the instruction that was interrupted.
- rYY, the Y operand (trap)
- Used, when trapping, to store the Y operand of the interrupted instruction.
- rZZ, the Z operand (trap)
- Used, when trapping, to store the Z operand of the interrupted instruction.
As of July 2010, no known hardware implementations of the MMIX instruction set architecture exist. However, the fpgammix project implements MMIX in Verilog, making it possible to implement using a field-programmable gate array.
The MMIX instruction set architecture is supported by a number of software tools for computer architecture research and software development.
Simulators and assembler
- MMIXware – Donald Knuth’s MMIX-SIM simple (behavioral) simulator, MMIXAL assembler, test suite, sample programs, full documentation, and MMIX architectural (pipeline) simulator (
- MMIXX – An X11-based graphics package contributed by Andrew Pochinsky of MIT’s Center for Theoretical Physics which, when combined with the MMIXware sources above, augments the MMIX virtual machine with a 640×480 pixel, true-color ‘virtual display’ (for UNIX/Linux).
The GNU Compiler Collection includes an MMIX back-end for its C/C++ compilers, contributed by Hans-Peter Nilsson and part of the main GCC distribution since late 2001. As of January 2011, the MMIX back-end to GCC continues to be actively developed and maintained by volunteers.
- Installation instructions for GCC + MMIX tools by Hans-Peter Nilsson.
- §3.17.26. MMIX Options for GNU GCC version 4.5.2 (GNU GCC Web site).
- §9.25. MMIX-dependent Features for GNU as from GNU binutils version 2.21, the assembler back-end for GNU GCC (GNU Binutils Web site).
- Educational programming language
- Little man computer
- NAR 2, another processor designed by a professor to help students learn.
- Knuth, Donald E. (October 1999), MMIXware: A RISC Computer for the Third Millennium, Lecture Notes in Computer Science Tutorial 1750, Heidelberg: Springer-Verlag, ISBN 3-540-66938-8 (Errata)
- master (2008-08-24). "fpgammix". Repo.or.cz. Retrieved 2014-05-25.
- "MMIXware". Cs-faculty.stanford.edu. Retrieved 2014-05-25.
- "MMIXX". Malgil.com. 2002-03-06. Retrieved 2014-05-25.
- http://bitrange.com/mmix/install.html Installation instructions for GCC + MMIX tools
- http://gcc.gnu.org/onlinedocs/gcc-4.5.2/gcc/MMIX-Options.html §3.17.26. MMIX
- "§9.25 MMIX Dependent Features". Sourceware.org. Retrieved 2014-05-25.
- Donald E. Knuth (2005). The Art of Computer Programming Volume 1 Fascicle 1: MMIX A RISC Computer for the New Millennium. Addison-Wesley. ISBN 0-201-85392-2 (errata)
- Donald Knuth's MMIX page — A brief introduction to MMIX, and Knuth's reasons for using a hypothetical assembly language in TAoCP.
- Donald Knuth's MMIX news page — An open-source simulator written in CWEB, a programmer's manual, and example programs.
- MMIXmasters web site — A web site for the volunteers (MMIXmasters) who are converting all of the programs in TAOCP, Volumes 1–3, from the old MIX to the new MMIX.
- VMMMIX — VMMMIX is the MMIX virtual machine. It has console, HDD and Ethernet I/Os. Currently, this virtual machine runs on Windows only. And Linux runs on this MMIX virtual machine.
- The MMIX Homepage — In September 2011, MMIX has moved its home from Stanford to Munich.
- The VMB Homepage — The Virtual Motherboard Project offers a plug and play collection of devices that can be used with an appropriate version of the MMIX CPU.