Minimig

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Minimig 120x120 mm PCB board (Nano-ITX size)[1]

Minimig (short for Mini Amiga) is an open source re-implementation of an Amiga 500 using a field-programmable gate array (FPGA).

Minimig started in secrecy around January 2005 as a proof of concept by Dutch electrical engineer Dennis van Weeren. He intended Minimig as the answer to the ongoing discussions within the Amiga community on implementing the Amiga custom chipset using an FPGA. The project's source code and schematics were released under version 3 of the GNU General Public Licence on 25 July 2007.

Original prototype[edit]

The original Minimig prototype is based on the Xilinx Spartan-3 Starter Kit, the Original Amiga Chipset is synthesized in the FPGA. Two printed circuit boards are attached via the FPGA kit expansion ports. The first one holds a 3.3V Motorola 68000 type CPU. The second has a MultiMediaCard slot with a small PIC microcontroller acting as a disc controller that supports the FAT16 filesystem and does on-the-fly Amiga disk file (ADF) decoding.

     VGA-+-PS2  (joystick etc.)
         |
CPU <-> FPGA <-> Microcontroller <-> Flashmemory
         |
        RAM

The prototype was shown[2] at an Amiga meet and loaded most Amiga programs although bugs did exist. Van Weeren's personal preferences led to the use of verilog instead of VHDL on a PC using Xilinx Webpack software for code development.

Purposes and intent[edit]

  • Run Amiga-specific application software to convert files to newer platforms.
  • Run software only available on Amiga.
  • Running Amiga video games.
  • FPGA development experience using Verilog.
  • Creating something for the community.
  • Proof of Concept.
  • Allows creation of new games that take advantages of the new features in Minimig (faster memory, more memory sprites, colours, etc.), while maintaining full compatibility with the Amiga.

Hardware[edit]

Platform[edit]

As of Minimig rev1.0 board:

  • Xilinx Spartan-3 400k gate (XC3S400-4PQ208C) FPGA using 82% capacity.
  • Freescale MC68SEC000, 3.3V, at 7.09379 MHz. However there's no 'E' clock, MOVE sr,<EA> is privileged and there is no real replacement instruction. This does not seem to affect any programs yet.
  • Amiga Chip RAM bus and Slow RAM merged into a single synchronous bus running at 7.09379 MHz.
  • 2 MB 70 ns asynchronous SRAM organised as 2x 524 288 x 16-bit banks.
  • MCU PIC 18LF252-I/SP[3] (An alternative is Atmel AVR) implements a FAT16 disk layout and handles loading of FPGA configuration and Kickstart. Simulates a floppy to the Amiga by encoding on the fly from ADF files.
  • MMC Flash memory card to load FPGA configuration, kickstart and software for the implemented computer.
  • 3× LEDs to display the disk activity, main power and Amiga power up status (no existing audio filter!) Amiga power up status led will change intensity to show audio filter status.
  • Video D/A consists of 4 resistors for each color red, green, blue (4 bits/color) and output via VGA connector.[4]
  • Audio from an 8 bit dithering sigma-delta converter with 2nd order analogue filter.
  • +5V DC main power (~200 mA).

Ports[edit]

Implementation[edit]

  • Motorola 68000 type CPU.
  • Hardware OCS and ECS, PAL & NTSC video switchable via OSD.
  • 512 kB SRAM for Kickstart used as ROM.
  • 0 .. 1536 kB Slow RAM expansion (originally 512 kB).[5]
  • 512 .. 2048 kB Chip RAM (originally 1024 kB).
  • On-screen display offers selection of ADF disk images from the SD/MMC card using the keyboard or a joystick.

Roadmap[edit]

Date Event
2005-03-06 Verilog sources coding started.
2005-12-05 Announcement of the project.
2006 Spring Verilog sources completed.
2006-06-11 Screenshoot of schematic for board v1.0 published.
2006-10-15 Schematic for board v1.0 completed.
2007-06-xx Sources predicted to be released, but weren't.
2007-07-04 Last source edit (core).
2007-07-13 Busy making website for the project.
2007-07-24 Minimig sources released on the official website.

Issues[edit]

Development tools used[edit]

  • Computer: Shuttle barebone, Prescott Pentium 4 (L2-cache 1024 kB, 533 - 800 MT/s) 3 GHz, 1 GB RAM,
  • Software: Xilinx Webpack version 6.3.03i (2007-07-22 9.1). Time from HDL source to loadable configuration file (.bit) = 2 minutes. CPU cache and memory speed is vital for the Synthesis + Place & Route Silicon compiler in FPGA generation software.

Future[edit]

  • Possible developments include a faster CPU, ECS chipset, AGA graphics (new FPGA board is required), hard disk, ethernet, small RISC-Core for enhanced AROS functions etc.
  • Use of a free kickstart replacement (e.g. AROS).[8]
  • A networked version would eliminate the need for swapping flash memories.

Upgrades[edit]

Read/Write support[edit]

On 2008-09-03 a new FPGA core enables read/write support, as well as some Chipset improvements.[9]

ARM Controller board upgrade[edit]

On 2008-12-22 a replacement board that fits in the PIC (MCU) controller socket were announced. It makes harddrive, 4x floppy disk and write support possible.[10] The FPGA core is the same for the new ARM and PIC firmware but only the ARM has enough resources to support four drives. The PIC only supports two. The upgrade also allows one to select to increase the CPU speed from 7.09 to 49.63 MHz with a 4kb zero waitstate cpu cache. But it requires an FPGA core to actually carry it out (which works with the 16 MHz 68SEC000 chips).[11] The harddrive support is available by a virtual A600/A1200 style GAYLE parallel ATA interface. Up to 551 kByte/s[11] is possible with a minor hardware modification. Otherwise only ~300 kByte/s is possible.[12]

Additional 2 MB RAM[edit]

On 2008-12-22 a modification of the original PCB by piggybacking another set of SRAM chips enables up to 4 MiB of RAM in total.[10]

AGA Support[edit]

An unreleased Minimig core has been upgraded with AGA support and extended to support at least 50 MiB of Chip memory on the prototype Replay board designed by Mike Johnson at FPGA Arcade.[13][14][15]

Similar projects[edit]

Illuwatar, a small private hardware designer in Sweden, implemented a Mini-ITX form factor version of the Minimig under the Open Source design License. This hardware version fits in standard Mini-ITX cases and has dimensions of 17 cm x 17 cm. Connecting ports in this version were moved to the back of the mainboard to comply with Mini-ITX requirements.

On 9 Feb 2008 ACube Systems announced the availability of finished Minimig v1.1 boards.[16]

On 2006-10-11 Jens Schönfeld at Individual Computers revealed that they had been working on a commercial Amiga-in-FPGA for the past year called "Clone-A" that is similar to Minimig. In contrast to Minimig, Individual Computers's Clone-A was developed by a three-person development team employing a powerful logic analyzer. The system will use clone chips to replace CIAs, Paula, Gary, Agnus and Denise. The CPU will be the original from Motorola. Final chips will also include AGA and a working parallel port to enable 4-player games.[17]

Wolfgang Förster has completed the Suska project, which is an Atari ST-on-FPGA.

Natami (derived from Native Amiga) is a closed source advanced Amiga compatible machine, allowing users to run original Amiga 68k software and will update the original Amiga design to modern standards. It introduces a new 3D softcore responsible for 3D graphics acceleration as well as an "68050" softcore as an addition to the 68k family CPU, more compatible with 68000 than e.g. 68060, yet more advanced and with higher clock frequency.

Inspired by Minimig Till Harbaum invented MIST, an open FPGA based implementation of Atari ST and Amiga intended to have a low price and be easy built at home. Different than Miniming, the 68000 CPU is not present as physical device but implemented inside the FPGA.

References[edit]

External links[edit]