Multimedia Acceleration eXtensions
The Multimedia Acceleration eXtensions or MAX are instruction set extensions to the Hewlett-Packard PA-RISC instruction set architecture (ISA).
MAX was developed to improve the performance of multimedia applications that were becoming more prevalent during the 1990s.
MAX instructions operate on 32- or 64-bit SIMD data types consisting of multiple 16-bit integers packed in general purpose registers. The available functionality includes additions, subtractions and shifts.
The first version, MAX-1, was for the 32-bit PA-RISC 1.1 ISA. The second version, MAX-2, was for the 64-bit PA-RISC 2.0 ISA.
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[edit] Implementations
MAX-1 was first implemented with the PA-7100LC in 1994. It is usually attributed as being the first SIMD extensions to an ISA. The second version, MAX-2, was for the 64-bit PA-RISC 2.0 ISA. It was first implemented in the PA-8000 microprocessor released in 1996.
[edit] MAX-1
| Instruction | Description |
|---|---|
| HADD | Parallel add with modulo arithmetic |
| HADD,ss | Parallel add with signed saturation |
| HADD,us | Parallel add with unsigned saturation |
| HSUB | Parallel subtract with modulo arithmetic |
| HSUB,ss | Parallel subtract with signed saturation |
| HSUB,us | Parallel subtract with unsigned saturation |
| HAVE | Parallel average |
| HSHLADD | Parallel shift left and add with signed saturation |
| HSHRADD | Parallel shift right and add with signed saturation |
[edit] MAX-2
MAX-2 instructions operate on multiple integers in 64-bit quantities. All have a one cycle latency in the PA-8000 microprocessor and its derivatives.
| Instruction | Description |
|---|---|
| HADD | Parallel add with modulo arithmetic |
| HADD,ss | Parallel add with signed saturation |
| HADD,us | Parallel add with unsigned saturation |
| HSUB | Parallel subtract with modulo arithmetic |
| HSUB,ss | Parallel subtract with signed saturation |
| HSUB,us | Parallel subtract with unsigned saturation |
| HSHLADD | Parallel shift left and add with signed saturation |
| HSHRADD | Parallel shift right and add with signed saturation |
| HAVG | Parallel average |
| HSHR | Parallel shift right signed |
| HSHR,u | Parallel shift right unsigned |
| HSHL | Parallel shift left |
| MIXH | Mix |
| MIXW | Mix |
| PERMH | Permute |
[edit] References
- Lee, Ruby B. (April 1995). "Accelerating Multimedia with Enhanced Microprocessors". IEEE Micro.
- Lee, Ruby and Huck, Jerry. "64-bit and Multimedia Extensions in the PA-RISC 2.0 Architecture". Proceedings of Compcon 1996.
- Lee, Ruby B. (August 1996). "Subword Parallelism with MAX-2". IEEE Micro.
- Multimedia Acceleration eXtensions (MAX-1 and MAX-2) PA-RISC CPU Architecture OpenPA.net
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