|Non-Volatile Memory Host Controller Interface Working Group|
NVM Express, NVMe, or Non-Volatile Memory Host Controller Interface Specification (NVMHCI), is a specification for accessing solid-state drives (SSDs) on a PCI Express bus. NVM is an acronym for non-volatile memory, as used in SSDs.
NVM Express is an optimized, high performance, scalable host controller interface with a streamlined register interface and command set designed for enterprise and client systems that use PCI Express SSDs. NVMe reduces latency and provides faster performance, with support for security and end-to-end data protection. NVMe specifications were developed by the NVM Express Workgroup. The NVM Express Workgroup consists of more than 90 companies.
Historically, most SSDs used busses such as SATA, SAS or Fibre Channel. SATA has been the most typical way to connect SSDs in the personal computer, but SATA was designed for mechanical hard disk drives, and has become increasingly inadequate as SSDs have improved. For example, unlike hard disk drives, some SSDs are limited by the maximum throughput of SATA.
SSDs have been made using the PCI Express bus before, but using non-standard specification interfaces. By standardizing the interface of the SSDs, operating systems only need one driver to work with all SSDs adhering to the specification. It also means that each SSD manufacturer doesn't have to use resources to design specific interface drivers. This is similar to how USB devices are built to follow the USB specification and work with all computers, with no per-device driver needed.
Amber Huffman of Intel was working group chair. Version 1.0 of the specification was released on March 1, 2011. Version 1.1 of the specification was released on October 11, 2012. An update called version 1.0e was released in January 2013.
Comparison with AHCI
While Advanced Host Controller Interface (AHCI) interface has the benefit of legacy software compatibility, it does not deliver optimal performance when talking to a PCI Express SSD. This is because AHCI was developed at a time when the purpose of the Host Bus Adapter (HBA) in a system was to connect the CPU/memory subsystem with the much slower storage subsystem based on rotating magnetic media. Such an interface has some inherent inefficiency when applied to SSD devices, which behave much more like DRAM than spinning media.
NVMe has been designed from the ground up to exploit the low latency and parallelism of PCI Express SSDs, fulfilling the parallelism of contemporary CPUs, platforms and applications. At a high level, the basic advantages of NVMe over AHCI relate to the ability to exploit parallelism in host hardware and software, manifested by differences in depth of command queues, interrupt processing, the number of uncacheable register accesses etc. The table below summarizes the high level differences between the basic NVMe and AHCI device interfaces:
|Maximum queue depth||1 command queue;
32 commands per queue
65536 commands per queue
|Uncacheable register accesses
(2000 cycles each)
|6 per non-queued command;
9 per queued command
|2 per command|
and interrupt steering
|2048 MSI-X interrupts|
and multiple threads
|requires synchronization lock
to issue a command
for 4 KB commands
|command parameters require
two serialized host DRAM fetches
|gets command parameters
in one 64 Bytes fetch
Operating system support
The "NVMe Windows Working Group" is an initiative from the OpenFabrics Alliance to maintain software for Microsoft Windows to use PCI Express solid state devices. The baseline Windows driver contributed to the open-source initiative was developed by several promoter companies in the NVMe workgroup, specifically IDT, Intel, and LSI.
An open source driver is available on SourceForge.
- SATA Express (interface specification supporting either SATA or PCI Express storage devices)
- M.2 (connector and card format specification, supporting either SATA or PCI Express storage devices)
- Walker, Don H. "A Comparison of NVMe and AHCI". 31 July 2012. The Serial ATA International Organization. Retrieved 3 July 2013.
- "NVM Express Explained".
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- Amber Huffman editor (October 11, 2012). "NVM Express Revision 1.1". Specification. Retrieved September 18, 2013.
- Amber Huffman editor (January 23, 2013). "NVM Express Revision 1.0e". Specification. Retrieved September 18, 2013.
- Dave Landsman. "AHCI and NVMe as Interfaces for SATA Express™ Devices - Overview" (PDF). SanDisk. Retrieved 2013-10-02.
- "Windows NVM Express". Project web site. Retrieved September 18, 2013.
- Matthew Wilcox (2011-03-03). "NVM Express driver". LWN.net. Retrieved 2013-11-05.
- Keith Busch (2013-08-12). "Linux NVMe Driver" (PDF). flashmemorysummit.com. Retrieved 2013-11-05.
- "Merge git://git.infradead.org/users/willy/linux-nvme". kernel.org. 2012-01-18. Retrieved 2013-11-05.
- "Log of /head/sys/dev/nvme". FreeBSD source tree. The FreeBSD Project. Retrieved 16 October 2012.
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- ChangeLog/1.6 - QEMU