NS320xx

The 320xx or NS32000 was a series of microprocessors from National Semiconductor ("NS", "NSC", "Natsemi"). They were likely the first 32-bit general-purpose microprocessors on the market, but due to a number of factors never managed to become a major player. The 320xx series was also used as the basis of the Swordfish microcontroller. It was replaced by the CompactRISC architecture in mid-1990.

Architecture

The processors had 8 general purpose 32-bit registers, plus a series of special-purpose registers:

• Frame pointer
• Stack pointer (one each for user and supervisor modes)
• Static base register, for referencing global variables
• Link Base register for dynamically linked modules (object orientation)
• Program counter
• A typical processor status register, with a low-order user byte and a high-order system byte.

(Additional system registers not listed).

The instruction set was very much in the CISC model, with 2-operand instructions, memory-to-memory operations, flexible addressing modes, and variable-length byte-aligned instruction encoding. Addressing modes could involve up to two displacements and two memory indirections per operand as well as scaled indexing, making the longest conceivable instruction 23 bytes. The actual number of instructions was much lower than that of contemporary RISC processors.

Unlike some other processors, autoincrement of the base register was not provided; the only exception was a "top of stack" addressing mode that would pop sources and push destinations. Uniquely, the size of the displacement was encoded in its most significant bits: 0, 10 and 11 preceded 7-, 14- and 30-bit signed displacements. (Although the processors were otherwise consistently little-endian, displacements in the instruction stream were stored in big-endian order).

General purpose operands were specified using a 5-bit field. To this could be added an index byte (specifying the index register and 5-bit base address), and up to 2 variable-length displacements per operand.

Beginnings: the 32016 and 32032

NS32008 microprocessor.

NS32016 Microprocessor

National Semiconductor NS32081 FPU.

National Semiconductor NS32032 microprocessor.

The first chip in the series was originally called 16032, later renamed 32016 to emphasize its 32-bit internals. It became available in 1982, and may have been the first 32-bit chip to reach mass production and sale (at least according to National Semiconductor marketing). The MC68000 was released earlier with an instruction set allowing 32 bit operations, but the internal implementation was 16 bit, so 32 bit instructions would take 2 x the time of a 16 bit instruction. The 16032 would do 32 bit instructions as fast as 16 bit instructions. It took a long time to get the production to production, and in 1984 the errata list still contained items specifying uncontrollable conditions which would result in the processor coming to a halt, forcing a reset. NSC changed design methodology to make it possible to get the part into production and a design system based on the language "Z" was codeveloped with the University of Tel-Aviv, close to the "NSC" design centre in Herzlya, Israel. The "Z" language was similar to today Verilog and VHDL, but had a Pascal like syntax and was optimized for 2-phase clock designs.

The original 32016 had a 16-bit external databus, a 24-bit external address bus, and a full 32-bit instruction set. It also included a coprocessor interface which allows coprocessors such as FPUs and MMUs to be attached as peers to the main processor. The MMU was based on Demand Paging Virtual Memory, which was the most unique feature compared to the segmented memory approach used by competition, and has become the standard for how microprocessors are designed today. The architecture supported an instruction restart mechanism on a page fault, which was much cleaner than the Motorola approach to dump the internal status on a page fault, which had to be read back, before the instruction was continued. Again, the Series 32000 approach has become the standard behaviour.

The instruction set was extremely complex but mostly regular, with a large set of addressing modes. It was somewhat similar in spirit to (but not compatible with) the popular DEC VAX minicomputer instruction set. The 32016 was by some considered to be very similar to the Motorola 68000, which also used 32-bit internals with a 16-bit data bus and 24-bit address bus. This was rejected by "NSC" employees, and one of the key marketing phrases of the time was "Elegance is Everything", comparing the highly orthogonal Series 32000 to the "kludge". One key difference was the Motorola use of Address Register and Data Registers with instructions only working on either Address or Data Registers. The Series 32000 had general purpose registers.

The original intention of National Semiconductor was to design a VAX-11 on a chip, and National took DEC to court in California (Home of NSC) to ensure the legality of the design. When DEC managed to get the lawsuit moved to Massachusetts (Home of DEC), the lawsuit was dropped and the Series 32000 architecture was developed.

The 32032 was introduced in 1984. It was almost completely compatible, but featured a 32-bit data bus (although keeping the 24-bit address bus) for somewhat faster performance. The 32032 was also renamed at the same time as the 16032, and the new name was 32032. There was also a 32008, which was a 32016 with a data bus cut down to 8-bits wide for low cost applications. It was philosophically similar to the MC68008, and equally unpopular. Both these chips were designed to fit into the original IBM PC, but as everyone knows, and regrets, Intel won that race with the 8088.

National Semiconductor also produced related support chips like Floating Point Units (FPUs) NS32081, Memory Management Units (MMUs) NS32082, Direct Memory Access (DMA) NS32203 and Interrupt NS32202 Controllers. With the full set plus memory chips and peripherals, it was feasible to build a 32-bit computer system capable of supporting modern multi-tasking operating systems, something that had previously been possible only on expensive minicomputers and mainframes.

The 32332, 32532, Swordfish & Others

During the 1980s, successor chips called the NS32332 and NS32532 arrived, maintaining a good degree of compatibility, with much improved reliability and performance. By then the damage to reputation had been done, however, and these chips were (probably unjustly) ignored by most of the market.

In 1985, National Semi introduced the NS32332, which was a much improved version of the 32032. From the datasheet, the enhancements include "the addition of new dedicated addressing hardware (consisting of a high speed ALU, a barrel shifter and an address register), a very efficient increased (20 bytes) instruction prefetch queue, a new system/memory bus interface/protocol, increased efficiency slave processor protocol and finally enhancements of microcode." There was also a new NS32382 MMU, NS32381 FPU and the (very rare) NS32310 interface to a Weitek FPA. The aggregate performance boost of the NS32332 from these enhancements only made it50% faster than the original NS32032, and therefore less than that of the main competitor, the MC68020.

In the Spring of 1987, National Semi introduced the NS32532. Running at 20-, 25- & 30-MHz, the NS32532 was a complete redesign of the internal implementation with a five stage pipeline, an integrated Cache/MMU and improved memory performance making it about twice as performant as the competing MC68030 and i80386. At this stage the RISC architectures was starting to make inroads, and main competitors became the now equally dead AM29000 and MC88000, which was considered faster than the NS32532. Interestingly, there wasn't a new FPU; the NS32532 used the existing NS32381.(1) The NS32532 was the basis of one of the few fully realized "public domain" hardware projects (that is, resulting in an actual, useful machine running a real operating system, in this case Minix or NetBSD), the PC532.

The semi-mythical NS32732 (sometimes called NS32764), originally envisioned as the high performance successor to the NS32532. This program never came to the market, but a derivative called Swordfish aimed at embedded systems arrived circa 1990. The Swordfish had an integrated floating point unit, Timers, DMA controllers and other peripherals normally not available in Microprocessors. It had a 64 bit databus and was internally overclocked from 25 to 50 MHz. The chief architect of the Swordfish was Donald Alpert, who went on to manage the architectural team designing the Pentium. The Pentium internal microarchitecture is similar to the preceding Swordfish. The focus of Swordfish was high end Postscript Laserprinters, and performance was exceptional of the time. Competing solutions would produce 1 new page per minute, and the Swordfish demo would happily print out the 16 page per minute supported by the laser engine mechanics, and then on each page print out how much time is was idling, waiting for the engine to complete. The Swordfish die was huge, and it was eventually decided to drop the project altogether, and the product never went into production. The lessons from the Swordfish was used for the CompactRISC designs. In the beginning, there were both a CompactRISC-32 and a CompactRISC-16, designed using "Z". National never brought a chip to the market with the CompactRISC-32 core. Nationals Research department worked with the University of Michigan to develop the first synthesizable Verilog Model, and Verilog was used from the CR16C and onwards.

Versions of the older NS32000 line for low cost products such as the NS32CG16, NS32CG160, NS32FV16, NS32FX161, NS32FX164 and the NS32AM160/1/3, all based on the NS302CG16 were introduced from 1987 and onwards. These processors had some success in the laser printer and fax market, despite intense competition from AMD and Intel RISC chips. Especially the NS32CG16 should be noted. The key difference between this and the NS32C016 was the integration of the expensive TCU (Timing Control Unit) which generated the needed two-phase clock from a crystal, and the removal of the floating point coprocessor support, which freed up microcode space for the useful BitBLT instruction set, which significantly improved the performance in laser printer operations, making this 60,000 transistor chip faster than the 200,000 transistor MC68020. The NS32CG160 was the CG16 with timers and DMA peripherals, while the NS32FV/FX16x chips had extra DSP functionality on top of the CG16 BitBLT core for the Fax/Answering Machine market. They were complemented by the NS32532 based NS32GX32 later. Unlike the previous chips, there were no extra hardware. The NS32GX32 was the NS32532 without the MMU sold at an attractive price for embedded system. In the beginning, this was just a remarked chip. It is unclear if the chip was redesigned for lower cost production.

Datasheets exist for an NS32132, apparently designed for multiprocessor systems. This was the NS32032 extended with an arbiter. The bus usage of the NS32032 was about 50%, due to its very compact instruction set, or due to its very slow pipeline as competitors would phrase it. The NS32132 chip allowed a pair of CPUs to be connected to the same memory system, without much change of the PCB. Prototype systems were built by Diab Data AB in Sweden, but performancewise, this system had less performance than the single CPU MC68020 system designed by the same company.

(1) In the sheet of NS32532 mentioned as a possible FPU the NS32381 and NS32580. The existence of the NS32580 is not occupied.

Machines Using the NS32000 Series

An few example machines using NS32000-series CPUs:

• Acorn Cambridge Workstation - NS32016 (with 6502 host)
• Intermec (Previously A-Tech and then UBI) Label Printer - NS32CG16
• BBC Micro - NS32016 Second Processor [1] [2] [3]
• Canon LBP-8 Mark III Laser Printer - NS32CG16
• Whitechapel MG-1 - NS32016
• Whitechapel MG200 - NS32332
• Opus - NS16032 PC Add-On Board
• Sequent Balance - NS32016, NS32032 & NS32332 Multiprocessor
• ETH Zurich Ceres workstation - NS32532
• Heurikon VME532 - NS32532 VME Card (with cache)
• PC532 - NS32532
• Tolerant Systems Eternity Series - NS32032 w/ NS32016 I/O processor
• National Semiconductor ICM-3216 - NS32016
• National Semiconductor ICM-332-1 - NS32332 w/ NS32016 I/O processor
• National Semiconductor SYS32/20 - NS32016 PC Add-On Board w/ Unix
• Encore Multimax - NS32332 & NS32532 Multiprocessor
• Trinity College Workstation - NS32332
• Tektronix 6130 & 6250 Workstation - NS32016 & NS32032
• Siemens PC-MX2 - NS32016
• Siemens MX300-05/-10/-15/-30 - NS32332 (-05/-10) or NS32532 (-15/-30) under SINIX (MX300-55 and later use i486)
• Siemens MX500-75/-85 - NS32532 (2-8x CPUs; Sequent Boards / MX500-90 uses 2-12x i486)
• Compupro 32016 - NS32016 S-100 Card
• Symmetric Computer Systems S/375[4] - NS32016, used to cross develop 386BSD
• General Robotics Corp. Python - NS32032 & N32016 Q-Bus Card
• Teklogix 9020 network controller - NS32332
• Labtam 32032

Similarly named non-NS processors

The use of some variation on the number "32" was the obvious naming scheme for any series of 32-bit microprocessors. This leads to a certain amount of confusion and totally unrelated processors with similar names. For example:

• There was the WE32xxx microprocessor series made by Western Electric. This chipset was used in the AT&T 3B2 series of minicomputers.
• A very widespread series of DSPs by Texas Instruments is the TMS320 line (starting with the TMS32010).
• There was also the NCR/32 ACCEL RISC architecture and its NCR/32-000 CPU, used in (among others) computers from Celerity Computing.

None of these are related to the National Semiconductor NS32000 series.

References

• Trevor G. Marshall, George Scolaro and David L. Rand: The Definicon DSI-32 Coprocessor. Micro Cornucopia, Aug/September 1985,
• Trevor G. Marshall, George Scolaro and David L. Rand: The DSI-32 Coprocessor Board. Part 1, BYTE, August 1985, pp 120–136; Part 2, BYTE, September 1985, p 116.

External links

Datasheets

• Data book NS32000 family (1986)
• NS32532
• NS32C032
• NS32381

This article is based on material taken from the Free On-line Dictionary of Computing prior to 1 November 2008 and incorporated under the "relicensing" terms of the GFDL, version 1.3 or later.