PSoC

PSoC

PSoC capacitive sensing development board

PSoC (Programmable System-on-Chip) is a family of integrated circuits made by Cypress Semiconductor. These chips include a CPU and mixed-signal arrays of configurable integrated analog and digital peripherals.

History

Commercial PSoC shipments began in 2002.

To promote the PSoC, Cypress sponsored a "PSoC Design Challenge" in Circuit Cellar magazine in 2002 and 2004.

PSoC is used in devices as simple as Sonicare toothbrushes and Adidas sneakers, and as complex as the TiVo set-top box. One PSoC, using CapSense, controls the touch-sensitive scroll wheel on the Apple iPod click wheel.

Description

PSoC Devices

PSoC is a software configured, mixed-signal array with a built-in MCU core. There are three different families of devices (2009):

• CY8C2xxxx series - Named 'PSoC 1' with CPU M8C
• CY8C3xxxx series - Named 'PSoC 3' with CPU 8051
• CY8C5xxxx series - Named 'PSoC 5' with CPU ARM Cortex M3

PSoC has three separate memory spaces: paged SRAM for data, Flash memory for instructions and fixed data, and I/O Registers for controlling and accessing the configurable logic blocks and functions. The device is created using SONOS technology.

PSoC resembles an ASIC: blocks can be assigned a wide range of functions and interconnected on-chip. Unlike an ASIC, there is no special manufacturing process required to create the custom configuration - only startup code that is created by Cypress' PSoC Designer IDE.

PSoC resembles an FPGA in that at power up it must be configured, but this configuration occurs by loading instructions from the built-in Flash memory. Unlike an FPGA, the current generation of PSoC cannot have its digital functions reprogrammed by VHDL or Verilog, it can only be configured with register settings.

PSoC most closely resembles a microcontroller in usage, where code is executed to interact with the user-specified peripheral functions (called "User Modules"), using automatically generated APIs and interrupt routines. The PSoC Designer IDE generates the startup configuration code and peripheral APIs automatically based upon the users selections in a Visual-Studio-like GUI.

PSoC Software

PSoC Designer

This is the first generation software IDE to design and debug and program the PSoC 1 devices. It introduced unique features including a library of pre-characterized analog and digital peripherals in a drag-and-drop design environment which could then be customized to specific design needs by leveraging the dynamically generated API libraries of code.

PSoC Creator

PSoC Creator is the second generation software IDE to design debug and program the PSoC 3 and PSoC 5 devices. The development IDE is combined with an easy to use graphical design editor to form a powerful hardware/software co-design environment.

Overview

PSoC 1	PSoC 3	PSoC 5	PSoC Tools
Performance optimized 8-bit M8U	Performance optimized single cycle 8-bit 8051 core	High-performance 32-bit ARM Cortex- M3	PSoC Creator Drag-n-drop based free IDE for PSoC 3 and PSoC 5
Up to 24 MHz, 4 MIPS Flash 4 KB to 32 KB SRAM 256B to 2 KB Operation 1.7V to 5.25V	Up to 67 MHz, 33 MIPS Flash 8 KB to 64 KB SRAM 2 KB to 8 KB Operation 0.5V to 5.5V	Up to 67 MHz, 100 MIPS Flash 32 KB to 256 KB SRAM 16 KB to 64 KB Operation 0.5V to 5.5V	PSoC Designer Drag-n-drop based free IDE for PSoC 1
1 Delta-Sigma ADC (6 to 14-bit) 131 ksps @ 8-bit Voltage Precision ±1.53% Up to 2 DACs (6 to 8-bit)	1 Delta-Sigma ADC (12 to 20-bit) 192 ksps @ 12-bit Voltage Precision ±0.1% Up to 4 DACs (12-bit)	1 Delta-Sigma ADC (12 to 20-bit); 2 SAR ADCs (12-bit) 192 ksps @12-bit;1 Msps @ 12-bit Voltage Precision ±1.0% Up to 4 DACs (12-bit)	PSoC 3 Featured Kits CY8CKIT-001 Kit CY8CKIT-030 Analog Kit
Active: 2 mA, Sleep: 3 μA FS USB 2.0, I2C, SPI, UART	Active: 1.2 mA, Sleep: 1 μA, Hibernate: 200 nA FS USB 2.0, I2C, SPI, UART, CAN, LIN, I2S	Active: 2 mA, Sleep: 2 μA, Hibernate: 300 nA FS USB 2.0, I2C, SPI, UART, LIN, I2S	PSoC 5 Featured Kits CY8CKIT-001 Kit CY8CKIT-050 Analog Kit
Requires ICE Cube and FlexPods	On-chip JTAG, Debug and Trace; SWD, SWV	On-chip JTAG, Debug and Trace; SWD, SWV	PSoC 1 Featured Kits CY8CKIT-001 Kit
Up to 64 I/O	Up to 72 I/O	Up to 72 I/O

PSoC Technology

A PSoC integrated circuit is composed of a core, configurable analog and digital blocks, and programmable routing and interconnect. The configurable blocks in a PSoC are the biggest difference from other microcontrollers. PSoC devices include up to 16 digital and 12 analog blocks, depending on the device.

The Core

The PSoC 1 core includes:

• The M8C MCU
• Flash memory
• SRAM
• Sleep and watchdog timers
• Multiple clock sources that include a PLL
• Internal main and low-speed oscillator
• External crystal oscillator for precision, programmable clocking

PSoC 1 devices can have up to two multiply–accumulate modules (MACs), which provide fast 8-bit multipliers or fast 8-bit multipliers with 32-bit accumulate, up to two decimators for digital signal processing applications, I2C functionality for implementing either I2C slave or master, and availability of a full-speed USB interface.

Configurable Analog and Digital Blocks

PsoC Block Example

Using configurable analog and digital blocks, designers can create and change mixed-signal embedded applications. The digital blocks are state machines that are configured using the blocks registers. There are two types of digital blocks, Digital Building Blocks (DBBxx) and Digital Communication Blocks (DCBxx). Only the communication blocks can contain serial I/O user modules, such as SPI, UART etc.

Each digital block is considered an 8-bit resources that designers can configure using pre-built digital functions or user modules (UM), or, by combining blocks, turn them into 16-, 24-, or 32-bit resources. Concatenating UMs together is how 16bit PWMs and timers are created.

There are two types of analog blocks. The continuous time (CT) blocks are composed of an op-amp circuit and designated as ACBxx where xx is 00-03. The other type is the switch cap (SC) blocks, which allow complex analog signal flows and are designated by ASCxy where x is the row and y is the column of the analog block. Designers can modify and personalize each module to any design.

Programmable Routing & Interconnect

PSoC mixed-signal arrays' flexible routing allows designers to route signals to and from I/O pins more freely than with many competing microcontrollers. Global buses allow for signal multiplexing and for performing logic operations. Cypress suggests that this allows designers to configure a design and make improvements more easily and faster and with fewer PCB redesigns than a digital logic gate approach or competing microcontrollers with more fixed function pins.

PSoC Kit

Key Features

• FPGA Configuration via the PSoC(R) Programmable System-on-Chip
• (4) CapSense buttons
• I2C temperature sensor
• (2) 6-pin expansion header
• USB-to-UART bridge interface
• I2C port
• SPI and BPI configuration
• Xilinx JTAG interface

See also

• Field-programmable_analog_array: field programmable analog array
• Reconfigurable computing

External links

• Cypress Semiconductor Official Website
• PSoC Website - Cypress
• PSoC Developer
• PSoC Zone (the French PSoC Community by ISTASE)
• Psoc-chile El primer web site en Español sobre Microcontroladore Psoc
• Technology solutions