||This article includes a list of references, but its sources remain unclear because it has insufficient inline citations. (October 2010)|
Power-on self-test (POST) is a process performed by firmware or software routines immediately after many digital electronic devices are powered on. Perhaps the most widely known usage pertains to computing devices (personal computers, PDAs, networking devices such as routers, switches, intrusion detection systems and other monitoring devices). Other devices include kitchen appliances, avionics, medical equipment, laboratory test equipment—all embedded devices. The routines are part of a device's pre-boot sequence. Once POST completes successfully, bootstrap loader code is invoked.
POST includes routines to set an initial value for internal and output signals and to execute internal tests, as determined by the device manufacturer. These initial conditions are also referred to as the device's state. They may be stored in firmware or included as hardware, either as part of the design itself, or they may be part of semiconductor substrate either by virtue of being part of a device mask, or after being burned into a device such as a programmable logic array (PLA).
Test results may either be displayed on a panel that is part of the device, or output via bus to an external device. They may also be stored internally, or may exist only until the next power-down. In some cases, such as in aircraft and automobiles, only the fact that a failure occurred may be displayed (either visibly or to an on-board computer) but may also upload detail about the failure(s) when a diagnostic tool is connected.
POST protects the bootstrapped code from being interrupted by faulty hardware. Diagnostic information provided by a device, for example when connected to an engine analyzer, depends on the proper function of the device's internal components. In these cases, if the device is not capable of providing accurate information—which ensures that the device is safe to run—subsequent code (such as bootstrapping code) may not be permitted to run.
- 1 IBM-compatible PC POST
- 2 Macintosh POST
- 3 Amiga POST
- 4 See also
- 5 References
- 6 External links
IBM-compatible PC POST
In IBM PC compatible computers, the main duties of POST are handled by the BIOS, which may hand some of these duties to other programs designed to initialize very specific peripheral devices, notably for video and SCSI initialization. These other duty-specific programs are generally known collectively as option ROMs or individually as the video BIOS, SCSI BIOS, etc.
The principal duties of the main BIOS during POST are as follows:
- verify CPU registers
- verify the integrity of the BIOS code itself
- verify some basic components like DMA, timer, interrupt controller
- find, size, and verify system main memory
- initialize BIOS
- pass control to other specialized BIOSes (if and when required)
- identify, organize, and select which devices are available for booting
The functions above are served by the POST in all BIOS versions back to the very first. In later BIOS versions, POST will also:
- discover, initialize, and catalog all system buses and devices
- provide a user interface for system's configuration
- construct whatever system environment is required by the target operating system
(In early BIOSes, POST did not organize or select boot devices, it simply identified floppy or hard disks, which the system would try to boot in that order, always.)
The BIOS begins its POST when the CPU is reset. The first memory location the CPU tries to execute is known as the reset vector. In the case of a hard reboot, the northbridge will direct this code fetch (request) to the BIOS located on the system flash memory. For a warm boot, the BIOS will be located in the proper place in RAM and the northbridge will direct the reset vector call to the RAM. (In earlier PC systems, before chipsets were standard, the BIOS ROM would be located at an address range that included the reset vector, and BIOS ran directly out of ROM. This is why the motherboard BIOS ROM is in segment F000 in the conventional memory map.)
During the POST flow of a contemporary BIOS, one of the first things a BIOS should do is determine the reason it is executing. For a cold boot, for example, it may need to execute all of its functionality. If, however, the system supports power saving or quick boot methods, the BIOS may be able to circumvent the standard POST device discovery, and simply program the devices from a preloaded system device table.
The POST flow for the PC has developed from a very simple, straightforward process to one that is complex and convoluted. During POST, the BIOS must integrate a plethora of competing, evolving, and even mutually exclusive standards and initiatives for the matrix of hardware and OSes the PC is expected to support, although at most only simple memory tests and the setup screen are displayed.
In earlier BIOSes, up to around the turn of the millennium, the POST would perform a thorough test of all devices, including a complete memory test. This design by IBM was modeled after their larger (e.g. mainframe) systems, which would perform a complete hardware test as part of their cold-start process. As the PC platform evolved into more of a commodity consumer device, the mainframe- and minicomputer-inspired high-reliability features such as parity memory and the thorough memory test in every POST were dropped from most models. The exponential growth of PC memory sizes, driven by the equally exponential drop in memory prices, thanks to Moore's Law, was also a factor in this, as the duration of a memory test using a given CPU is directly proportional to the memory size. The original IBM PC could be equipped with as little as 32 KiB of RAM and typically had between 64 and 640 KiB; the 3.14 MHz 8088 in an original IBM PC or XT could do a full memory test on 640K in about 30 seconds. A modern PC with a bus rate of around 1 GHz and a 32-bit bus might be 2000x or even 5000x faster, but it might have more than 3 GB of memory--5000x more. With people being more concerned with boot times now than in the 1980s, the 30 to 60 second memory test adds undesirable delay for a benefit of confidence that is not perceived to be worth that cost by most users. Therefore, most modern BIOS POST sequences have an option to skip most or all of the memory test except after a boot failure, and the default/factory settings usually have that option enabled.
Progress and error reporting
The original IBM BIOS made POST diagnostic information available by outputting a number to I/O port 80 (a screen display was not possible with some failure modes). Both progress indication and error codes were generated; in the case of a failure which did not generate a code, the code of the last successful operation was available to aid in diagnosing the problem. Using a logic analyzer or a dedicated POST card - an interface card that shows port 80 output on a small display - a technician could determine the origin of the problem. Once an operating system is running on the computer the code displayed by such a board may become meaningless, since some OSes, e.g. Linux, use port 80 for I/O timing operations. The actual numeric codes for the possible stages and error conditions differ from one BIOS supplier to another. Codes for different BIOS versions from a single supplier may also vary, although many codes remain unchanged in different versions.
Later BIOSes used a sequence of beeps from the motherboard-attached loudspeaker (if present and working) to signal error codes. Some vendors developed proprietary variants or enhancements, such as MSI's D-Bracket. POST beep codes vary from manufacturer to manufacturer.
Information on numeric and beep codes is available from manufacturers of BIOSes and motherboards. There are websites which collect codes for many BIOSes.
Original IBM POST beep codes
|1 short beep||Normal POST – system is OK|
|2 short beeps||POST error – error code shown on screen|
|No beep||Power supply, system board problem, disconnected CPU, or disconnected speaker|
|Continuous beep||Power supply, system board, or may be RAM problem, keyboard problem|
|Repeating short beeps||Power supply or system board problem or keyboard|
|1 long, 1 short beep||System board problem|
|1 long, 2 short beeps||Display adapter problem (MDA, CGA)|
|1 long, 3 short beeps||Enhanced Graphics Adapter (EGA)|
|3 long beeps||3270 keyboard card|
POST AMI BIOS beep codes
|1||Memory refresh timer error|
|2||Parity error in base memory (first 64 KiB block)|
|3||Base memory read/write test error|
|4||Motherboard timer not operational (check all PSU to MB connectors seated)|
|6||8042 Gate A20 test error (cannot switch to protected mode)|
|7||General exception error (processor exception interrupt error)|
|8||Display memory error (system video adapter)|
|9||AMI BIOS ROM checksum fix|
|10||CMOS shutdown register read/write fix|
|11||Cache memory test failed|
|12||Motherboard does not detect a RAM module (continuous beeping)|
Reference: AMIBIOS8 Check Point and Beep Code List, version 2.0, last updated 10 June 2008
POST beep codes on CompTIA A+ certification exam
These POST beep codes are covered specifically on the CompTIA A+ Exam:
|Steady, short beeps||Power supply may be bad|
|Long continuous beep tone||Memory failure|
|Steady, long beeps||Power supply bad|
|No beep||Power supply bad, system not plugged in, or power not turned on|
|No beep||If everything seems to be functioning correctly there may be a problem with the 'beeper' itself. The system will normally beep one short beep.|
|One long, two short beeps||Video card failure|
IBM POST diagnostic code descriptions
|600–699||Floppy-disk drive or adapter|
|900–999||Parallel printer port|
|1000–1099||Alternate printer adapter|
|1100–1299||Asynchronous communication device, adapter, or port|
|1500–1599||Synchronous communication device, adapter, or port|
|1700–1799||Hard drive and/or adapter|
|1800–1899||Expansion unit (XT)|
|2000–2199||Bisynchronous communication adapter|
|2400–2599||EGA system-board video (MCA)|
|7000–7099||Phoenix BIOS chips|
|7300–7399||3.5-inch disk drive|
|21000–21099||SCSI fixed disk and controller|
|21500–21599||SCSI CD-ROM system|
Old World Macs (until 1998)
Macs made after 1987 but prior to 1998, upon failing the POST, will immediately halt with a "death chime", which is a sound that varies by model; it can be a beep, a car crash sound, the sound of shattering glass, a short musical tone, or more. On the screen, if working, will be the Sad Mac icon, along with two hexadecimal strings, which can be used to identify the problem. Macs made prior to 1987 crashed silently with the hexadecimal string and a Sad Mac icon.
New World Macs (1998–1999)
When Apple introduced the iMac in 1998, it was a radical departure from other Macs of the time. The iMac began the production of New World Macs, as they are called; New World Macs, such as the iMac, Power Macintosh G3 (Blue & White), Power Mac G4 (PCI Graphics), PowerBook G3 (bronze keyboard), and PowerBook G3 (FireWire), load the Mac OS ROM from the hard drive. In the event of an error, but not a fatal hardware error, they display the same screen as seen when holding ⌘ Command+⌥ Option+O+F at startup but with the error message instead of the "0 >" prompt. In the event of a fatal hardware error, they give these beeps:
|1||No RAM installed/detected|
|2||Incompatible RAM type installed (for example, EDO)|
|3||No RAM banks passed memory testing|
|4||Bad checksum for the remainder of the boot ROM|
|5||Bad checksum for the ROM boot block|
New World Macs (1999 onward) and Intel-based Macs
The beep codes were revised in October 1999, and have been the same since. In addition, on some models, the power LED would flash in cadence.
|1||No RAM installed|
|2||Incompatible RAM types|
|3||No good banks|
|4||No good boot images in the boot ROM (and/or bad sys config block)|
|5||Processor is not usable|
Amiga historical line of computers, from A1000 to 4000 present an interesting POST sequence that prompts the user with a sequence of flashing screens of different colors (rather than audible beeps as in other systems) to show if various hardware POST tests were correct or else if they failed:
POST sequence of Amiga
The Amiga system performs the following tests at boot:
- Step 1 - Delays beginning the tests a fraction of a second to allow the hardware to stabilize.
- Step 2 - Jumps to ROM code in diagnostic card (if found)
- Step 3 - Disables and clears all DMA and interrupts.
- Step 4 - Turns on the screen.
- Step 5 - Checks the general hardware configuration.
If the screen remains a light gray colors and the tests continue, the hardware is OK. If an error occurs, the system halts.
- Step 6 - Performs checksum test on ROMs.
If the system fails the ROM test, the screen display turns red and the system halts.
Sequence for all main Amiga models
Almost all Amiga models present the same color sequence when turned on:
Black screen, dark gray, light gray color screens filling all monitor screen in a rapid sequence (Amigas taken up usually 2, or at least max 3 seconds to turn on and boot).
Amiga color screens scheme
|Yellow||CPU Exception Before Bootstrap Code is Loaded|
|Green||Bad Chip RAM or fail of Agnus Chip (check seating of Agnus)|
|White||Expansion passed test successfully|
|Constant white||Failure of CPU|
|Violet||Return from InitCode()|
Sequence for A4000
Correct tests color sequence scheme
A4000 presents just a light gray screen during its boot time (it just occurs in 2 or max 3 seconds)
- Light Gray
- = Initial hardware configuration tests passed
- = Initial system software tests passed
- = Final initialization test passed
Failed tests color scheme
|Red||ROM Error - Reset or replace|
|Green||CHIP RAM error (reset AGNUS and re-test)|
|Blue||Custom Chip(s) Error|
|Yellow||68000 detected error before software trapped it (GURU)|
Amiga keyboard LED error signals
The keyboards of historical Amiga models are not proprietary as it happened in early computer ages, but more pragmatically it was based on international standard ANSI/ISO 8859-1. The keyboard itself was an intelligent device and had its own processor and 4 kilobytes of RAM for keeping a buffer of the sequence of keys that were being pressed, thus can communicate with the user if a fault is found by flashing its main LED in sequence:
|1||ROM checksum failure|
|2||RAM test failed|
|3||Watchdog timer failed|
|4||A shortcut exists between two row lines or one of the seven special keys (not implemented)|
- POST as part of the BIOS - by www.basicinputoutputsystem.com
- AMIBIOS8 Check Point and Beep Code List, Version 1.71
- AwardBios Version 4.51PG - POST Codes and Error Messages
- PhoenixBIOS 4.0 - Revision 6.0 POST Tasks and Beep Codes
- Power poweronselftest.com - from www.poweronselftest.com
- Amiga Power On Self Test and Color Screens Schemes at Wayback Machine (originally on NewTek Inc. site)
- What your Amiga is telling you article at Amiga History Guide
- Power On Self Test Beep Codes for AMI and Phoenix BIOS - from PC Hell.
- Computer Hardware - Additional information on computer POST / Beep Codes - from Computer Hope.