Register-transfer level
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In digital circuit design, register-transfer level (RTL) is a design abstraction which models a synchronous digital circuit in terms of the flow of digital signals (data) between hardware registers, and the logical operations performed on those signals.
Register-transfer-level abstraction is used in hardware description languages (HDLs) like Verilog and VHDL to create high-level representations of a circuit, from which lower-level representations and ultimately actual wiring can be derived. Design at the RTL level is typical practice in modern digital design.[1]
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[edit] RTL description
A synchronous circuit consists of two kinds of elements: registers and combinational logic. Registers (usually implemented as D flip-flops) synchronize the circuit's operation to the edges of the clock signal, and are the only elements in the circuit that have memory properties. Combinational logic performs all the logical functions in the circuit and it typically consists of logic gates.
For example, a very simple synchronous circuit is shown in the figure. The inverter is connected from the output of a register to the register's input, to create a circuit that changes its state on each rising edge of the clock. In this circuit, the combinational logic consists of the inverter.
When designing digital integrated circuits with a hardware description language, the designs are usually engineered at a higher level of abstraction than transistor level (logic families) or logic gate level. In HDLs the designer declares the registers (which roughly correspond to variables in computer programming languages), and describes the combination logic by using constructs that are familiar from programming languages such as if-then-else and arithmetic operations. This level is called register-transfer level. The term refers to the fact that RTL focuses on describing the flow of signals between registers.
As an example, the circuit mentioned above can be described in VHDL as follows:
D <= not Q; process(clk) begin if rising_edge(clk) then Q <= D; end if; end process;
Using an EDA tool for synthesis, this description can usually be directly translated to an equivalent hardware implementation file for an ASIC or an FPGA. The synthesis tool also performs logic optimization.
At the register-transfer level, some types of circuits can be recognized. If there is a cyclic path of logic from a register's output to its input (or from a set of registers outputs to its inputs), the circuit is called a state machine or can be said to be sequential logic. If there are logic paths from a register to another without a cycle, it is called a pipeline.
[edit] RTL in the circuit design cycle
RTL is used in the logic design phase of the integrated circuit design cycle.
An RTL description is usually converted to a gate-level description of the circuit by a logic synthesis tool. The synthesis results are then used by placement and routing tools to create a physical layout.
Logic simulation tools may use a design's RTL description to verify its correctness.
[edit] RTL in CPU design
RTL in CPU design is one of the fundamental levels of study in the field of computer engineering. Computer CPUs consist of several registers, and when a programmer can program at such a low level, it is called microprogramming, and the programmer is said to be a microprogrammer. At such level the programmer can directly control the transfer of data between the registers.
Generally when programs execute, the instructions that are the basic blocks of a program are executed by the CPU. The program consists of two parts – the instructions and the data. When user commands the compiler to execute the program the CPU starts working and takes the instructions from the memory(RAM usually) into its memory which are called registers. Then the CPU operates on these registers and instruction is executed and the result is again put into the memory. After that again the same process starts and the register is filled again with a new instruction taken from the memory.
This process is usually done in the following steps:
- CPU places the memory address in the system bus from its address register when the controller in CPU commands it to do so.
- CPU places the control signal from the controller in CPU to instruct the memory about what to do with the memory address.
- Memory performs the task specified by the control signal, in case if the control signal is read(), then memory fetches the content of the memory address and put that on the bus, if control signal is write(), then the memory fetches the content from the bus and put that on the specified memory address.
- In first case the data (which might be the instruction or the real data) is put on the bus which is then taken by the CPU into its data register or instruction register depending on the data.
The above steps are the basic steps in the execution of a program. However one does not have such control over these steps when one programs in a high-level language because if provided with such control then the whole structure of how the CPU will operate must be changed, and the programmer will have to repeatedly take care of many low level concerns which becomes thoroughly annoying and obscures the power of abstraction high-level languages provide. Register-transfer languages, however, do allow us to have such control over the CPU's working.
[edit] See also
- Electronic design automation
- Electronic system level
- Integrated circuit design
- Synchronous circuit
- Algorithmic State Machine
[edit] References
- ^ Frank Vahid (2010). Digital Design with RTL Design, Verilog and VHDL (2nd ed.). John Wiley and Sons. p. 247. ISBN 9780470531082. http://books.google.com/books?id=-YayRpmjc20C&pg=PA247.