Render output unit
|This article does not cite any references or sources. (December 2009)|
The render output unit, often abbreviated as "ROP", and sometimes called (perhaps more properly) raster operations pipeline, is one of the final steps in the rendering process of modern 3D accelerator boards. The pixel pipelines take pixel and texel information and process it, via specific matrix and vector operations, into a final pixel or depth value. The ROPs perform the transactions between the relevant buffers in the local memory – this includes writing or reading values, as well as blending them together.
Historically the number of ROPs, TMUs, and pixel shaders have been equal. However, as of 2004, several GPUs have decoupled these areas to allow optimum transistor allocation for application workload and available memory performance. As the trend continues, it is expected that graphics processors will continue to decouple the various parts of their architectures to enhance their adaptability to future graphics applications. This design also allows chip makers to build a modular line-up, where the top-end GPU are essentially using the same logic as the low-end products.
|This computer graphics–related article is a stub. You can help Wikipedia by expanding it.|