SDS Sigma series

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Front panel of the SDS Sigma 5 computer at the Computer History Museum

The SDS Sigma series was a series of computers that was introduced by Scientific Data Systems in 1966.[1] The first machines in the series were the 16-bit Sigma 2 and the 32-bit Sigma 7; the Sigma 7 was the first 32-bit computer released by SDS. At the time the only competition for the Sigma 7 was the IBM 360.

Memory size increments for all SDS/XDS/Xerox computers was stated in kWords, not kBytes. For example, the Sigma 5 base memory was 16K 32-Bit words (64K Bytes). Maximum memory was limited by the length of the instruction address field of 17 bits, or 128K Words (512K Bytes). Although this is a trivial amount of memory in today's technology, Sigma systems performed their tasks exceptionally well, and few were deployed with, or needed, the maximum 128K Word memory size.

The Sigma series was commercially retired in the 1970s when Xerox, which bought SDS in 1969, left the mainframe computer business.[2]

Models[3][edit]

32-bit systems[edit]

An XDS Sigma 9 at the Living Computer Museum, Seattle, Washington, 2014
Model Date Floating point Decimal Byte string Memory map Max memory (kwords)
Sigma 7 1966 optional optional standard optional 128
Sigma 5 1967 optional N/A N/A N/A 128
Sigma 6 1970 optional standard standard standard 128
Sigma 9 1971 standard standard standard standard 512
Sigma 8 1972 standard N/A N/A N/A 128
Sigma 9 model 2  ? standard standard standard standard 256
Sigma 9 model 3 1973 standard N/A N/A standard 512

16-bit systems[edit]

Model Date Max memory (kwords)
Sigma 2 1966 64
Sigma 3 1969 64

Instruction format[edit]

The format for memory-reference instructions for the 32-bit Sigma systems is as follows:

    +-+--------------+--------+------+---------------------------+
    |*|   Op Code    |   R    |  X   |    Reference address      |
    +-+--------------+--------+------+---------------------------+
bit  0 1            7 8      1 1    1 1                         3
                             1 2    4 5                         1
 
Bit   0   indicates indirect address.
Bits  1-7   contain the operation code (opcode)
Bits  8-11  encode a register operand (0:15)
Bits 12-14  encode an index register (1:7). 0 indicates no indexing.
Bits 16-31  encode the address of a memory word.

For the Sigma 9, when real extended addressing is enabled, the reference address field is interpreted differently depending on whether the high-order bit is 0 or 1:

    +-+--------------+--------+------+-+-------------------------+
    | |              |        |      |0| Address in 1st 64K words|
    |*|   Op Code    |   R    |  X   +-+-------------------------+ 
    | |              |        |      |1| Low 16 bits of address  |
    +-+--------------+--------+------+-+-------------------------+
bit  0 1            7 8      1 1    1 1 1                       3
                             1 2    4 5 6                       1

If the high-order bit is 0, the lower 16 bits of the address refer to a location in the first 64K words of main memory; if the high-order bit is 1, the lower 16 bits of the address refer to a location in a 64K-word block of memory specified by the Extension Address in bits 42-47 of the Program Status Doubleword, with the Extension Address being concatenated with the lower 16 bits of the reference address to form the physical address.

Features[edit]

CPU[edit]

Sigma systems provided a range of performance, roughly doubling from Sigma 5, the slowest, to Sigma 9 Model 3, the fastest. For example, 32-bit fixed point multiply times ranged from 7.2 to 3.8 μs; 64-bit floating point divide ranged from 30.5 to 17.4 μs.

Most Sigma systems included two or more blocks of 16 general-purpose registers. Switching blocks was accomplished by a single instruction (LPSD), providing fast context switching, since registers did not have to be saved and restored.

Memory[edit]

Memory in the Sigma systems could be addressed as individual bytes, halfwords, words, or doublewords.

All 32-bit Sigma systems except the Sigma 5 and Sigma 8 used a memory map to implement virtual memory. The following description applies to the Sigma 9, other models had minor differences.

The effective virtual address of a word was 17 bits. Virtual addresses 0 thru 15 were reserved to reference the corresponding general purpose register, and were not mapped. Otherwise, in virtual memory mode the high-order eight bits of this address, called virtual page number, were used as an index to an array of 256 13-bit memory map registers. The thirteen bits from the map register plus the remaining nine bits of the virtual address formed the address used to access real memory.

Access protection was implemented using a separate array of 256 two-bit access control codes, one per virtual page (512 words), indicating a combination of read/write/execute or no access to that page.

Independently, an array of 256 2-bit access control registers for the first 128k words of real memory functioned as a "lock-and-key" system in conjunction with two bits in the program status doubleword. The system allowed pages to be marked "unlocked", or the key to be a "master key". Otherwise the key in the PSD had to match the lock in the access register in order to reference the memory page.

Peripherals[edit]

Input/output was accomplished using a control unit called an IOP (Input-output processor). An IOP provided an 8-bit data path to and from memory. Systems supported up to 8 IOPs, each of which could attach up to 32 device controllers.[4] [5]

An IOP could be either a selector I/O processor (SIOP) or a multiplexer I/O processor (MIOP). The SIOP provided a data rate up to 1.5 megabytes per second (MBPS), but allowed only one device to be active at a time. The MIOP, intended to support slow speed peripherals allowed up to 32 devices to be active at any time, but provided only a .3 MBPS aggregate data rate.

Mass storage[edit]

RAD with cover open and disk pulled out for maintenance

The primary mass storage device, known as a RAD (random-access disk), contained 512 fixed heads and a large (approx 600 mm/24 in diameter) vertically mounted disk spinning at relatively low speeds. Because of the fixed head arrangement, access was quite fast. Capacities ranged from 1.6 to 6.0 megabytes and was used for temporary storage. Large-capacity multi-platter disks were employed for permanent storage.

Sigma mass storage devices
Device Device type Capacity [MB] Avg seek time [ms] Avg rotational delay [ms] Avg transfer rate [kB/s]
3214 RAD 2.75 N/A 8.5 647
7202 RAD .7 N/A 17 166
7203 RAD 1.4 N/A 17 166
7204 RAD 2.8 N/A 17 166
7232 RAD 6.0 N/A 17 355
3231 Cartridge disk 2.4 removable 38 12.5 246
3232 Cartridge disk 4.9 removable 38 12.5 246
3233 Cartridge disk 4.9 fixed
4.9 removable
38 12.5 246
3242 Cartridge disk 5.7 removable 38 12.5 286
3243 Cartridge disk 5.7 fixed
5.7 removable
38 12.5 286
7251 Cartridge disk 2.3 removable 38 12.5 225
7252 Cartridge disk 2.3 fixed
2.3 removable
38 12.5 225
3277 Removable disk 95 30 8.3 787
7271 Removable disk 46.8 35 12.5 245

Communications[edit]

The Sigma 7611 Character Oriented Communications subsystem (COC) supported one to seven Line Interface Units (LIUs). Each LIU could have one to eight line interfaces capable of operating in simplex, half-duplex, or full-duplex mode. The COC was "intended for low to medium speed character oriented data transmissions."[6]

System control unit[edit]

The System Control Unit (SCU) was a "microprogrammable data processor" which could interface to a Sigma CPU, and "to peripheral and analog devices, and to many kinds of line protocol."[7] The SCU executed horizontal microinstructions with a 32-bit word length. A cross-assembler running on a Sigma system could be used to create microprograms for the SCU.

Carnegie Mellon Sigma 5[edit]

The Sigma 5 computer owned by Carnegie Mellon University was donated to the Computer History Museum in 2002. The system consisted of five full-size cabinets with a monitor, control panel and a printer. It is possibly the last surviving Sigma 5 that is still operational.[2]

The Sigma 5 sold for US$300,000 with 16 kilowords of random-access magnetic-core memory, with an optional memory upgrade to 32 kW for an additional $50,000. The hard disk drive had a capacity of 3 megabytes.[8]

32-bit software[edit]

Operating systems[edit]

Sigma 5 and 8 systems lacked the memory map feature, The Sigma 5 was supported by the Basic Control Monitor (BCM) and the Batch Processing Monitor (BPM). The Sigma 8 could run the Real-time Batch Monitor (RBM) as well as BPM/BTM.

The remaining models initially ran the Batch Processing Monitor (BPM), later augmented with a timesharing option (BTM); the combined system was usually referred to as BPM/BTM. The Universal Time-Sharing System (UTS) became available in 1971, supporting much enhanced time-sharing facilities. A compatible upgrade (or renaming) of UTS, Control Program V (CP-V) became available starting in 1973 and added real-time, remote batch, and transaction processing. A dedicated real-time OS, Control Program for Real-Time (CP-R) was also available for Sigma 9 systems. The Xerox Operating System (XOS), intended as an IBM DOS replacement, also ran on Sigma 6/7/9 systems, but never gained real popularity.

Third party operating systems[edit]

Some third party operating systems were available for Sigma Machines. One was named GEM (for Generalized Environmental Monitor), and was said to be "rather UNIX-like".[9] A second was named JANUS, from Michigan State University.[10][11]

Applications software[edit]

The Xerox software, called processors, available for CP-V in 1978 included:[12]

  • Terminal Executive Language (TEL) command language
  • Control Command Interpreter (CCL) batch counterpart of TEL
  • Various system management processors — backup/restore, accounting, etc.
  • EASY — TTY line editor
  • Extended FORTRAN IV
  • Meta-Symbol macro assembler
  • AP assembler
  • BASIC
  • FLAG —FORTRAN Load and Go
  • ANS COBOL
  • APL
  • RPG
  • Simulation Language (SL-l) 
  • LINK one-pass linking loader
  • LOAD two-pass overlay loader
  • LYNX loader
  • GENMD load module editor
  • DELTA machine language debugger
  • FORTRAN Debug Package (FDP)
  • COBOL On-line Debugger
  • EDIT — line editor
  • Peripheral Conversion Language (PCL) — pronounced "pickle" — data move/convert utility
  • Other service processors such as SYSGEN, ANLZ dump analyzer, library maintenance
  • Sort/Merge
  • EDMS database management 
  • GPDS General Purpose Discrete Simulator 
  • CIRC circuit analysis,
  • MANAGE —generalized file management system 

Program product, chargeable

16-bit software[edit]

Operating systems[edit]

The Basic Control Monitor (BCM) for the Sigma 2 and 3 provided "Full real-time capability with some provision for batch processing in the background."[13]

Clones[edit]

After Honeywell discontinued production of Sigma hardware — Xerox had sold most of the rights to Honeywell in July, 1975 — several companies produced or announced clone systems. The Telefile T-85, introduced in 1979, was an upward compatible drop-in replacement for 32-bit Sigmas. Ilene Industries Data Systems announced the MOD 9000, a Sigma 9 clone with an incompatible I/O architecture. Realtime Computer Equipment, Inc. designed the RCE-9, an upward compatible drop-in replacement that could also use IBM peripherals.[1] The Modutest Mod 9 advertised hardware and software compatibility with the Sigma 9.[14]

See also[edit]

References[edit]

  1. ^ a b "Computers that will not die – The SDS Sigma 7". 
  2. ^ a b "Carnegie Mellon’s Sigma-5 Retires After 30 Years of Service". Carnegie Mellon University. June 2002. Retrieved 2007-08-15. 
  3. ^ "sigmaCPUs.txt at bitsavers.org". Retrieved 2011-10-22. 
  4. ^ Scientific Data Systems (1966). Sigma Series Input Output Processors. Bevrly Hills, CA.: Scientific Data Systems. 
  5. ^ Mendelson, Myron J.; England, A. W. (November 7–10, 1966). "The SDS Sigma 7: A Real-Time Time-Sharing Computer". AFIPS Conference Proceedings, Volume 29. San Francisco, California: American Federation of Information Processing Societies. Retrieved 2011-03-26. 
  6. ^ Xerox Data Systems (1969). Character Oriented Communications Equipment Model 7611. p. 143. 
  7. ^ Xerox Data Systems (1973). System Control Unit (SCU) Reference Manual (Preliminary). p. 147. 
  8. ^ Spice, Byron (October 1, 2001). "Saying goodbye to the Sigma 5". Pittsburg Post-Gazette. Retrieved 2007-08-15. 
  9. ^ Kirkpatrick, Jim. "The Sigma Era". Retrieved August 29, 2013. 
  10. ^ Keith G. Calkins (June 1984). "The Computer That Will Not Die: The SDS SIGMA 7". Retrieved 29 August 2013. 
  11. ^ Kopf, J. O.; Plauger, P. J. (1968). "JANUS: a flexible approach to realtime timesharing". Proceeding AFIPS '68 (Fall, part II) Proceedings of the December 9–11, 1968, fall joint computer conference, part II: 1033–1042. doi:10.1145/1476706.1476722. 
  12. ^ Honeywell Information Systems Inc. (1978). Xerox Control Program-Five (CP-V) Xerox 560 and Sigma 5/6/7/9 Computers System Management Reference Manual. 
  13. ^ Scientific Data Systems (1969). SDS Sigma 2/3 Basic Control Monitor Reference Manual. El Segundo, CA.: Scientific Data Systems/a Xerox Company. 
  14. ^ Shoor, Rita (June 16, 1980). "Modutest CPU emulates Xerox Sigma 9". Computerworld. Retrieved August 20, 2012. 

External links[edit]