SUPRENUM

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SUPRENUM Supercomputer GmbH
Private
Industry Computer hardware
Computer software
Fate Dissolved
Successor PALLAS GmbH
Founded 1986
Founder Prof. Ulrich Trottenberg
Defunct Jul 12, 2010
Headquarters Bonn, Germany
Key people
Prof. Ulrich Trottenberg
Products SUPRENUM-1 Supercomputer, PEACE Operating System
Owner Prof. Ulrich Trottenberg, Krupp Atlas Elektronik GmbH, Stollmann GmbH, GMD FIRST

SUPRENUM (German: SUPerREchner für NUMerische Anwendungen, English: super-computer for numerical applications) was a German research project to develop a parallel computer from 1985 through 1990. It was a major effort which was aimed at developing a national expertise in massively parallel processing both at hardware and at software level.

Although the Suprenum-1 computer was the fastest massively parallel MIMD computer in the world during a period in 1992,[1] the project was set and is considered a commercial failure.

History[edit]

Funded by the Federal Ministry for Research and Technology (BMFT), the SUPRENUM project began in 1985 and BMFT funding continued until 1990 when a fully configured 256-node prototype Suprenum-1 machine was available. The project's inception in 1985 was preceded by a definition phase lasting more than one year in which ideas were gathered, concepts were formed and project partners were selected.

The project was two-tiered, of which only the first step was taken. In particular it was planned the following:[2]

  • Suprenum 1 subproject: production of a high-speed MIMD computer
  • Suprenum 2 subproject: expanding the core applications and algorithmic service classes to include complex and dynamic grid structures; data-dependent adaptive procedures, irregular and highly dimensional grids, Monte Carlo methods based on grid structures, non-grid applications, etc., development of innovative language concepts which support automatic load distribution (particularly with dynamic grid structures) to the multiple-processor structure, investigation of alternative interconnecting structures (other topologies, variable interconnection networks) in particular with regard to dynamic grid structures and automatic load distribution strategies,new processor technologies (VLSI, GaAs and so on).

The mandate accompanying the funding was to create a project that included both a research and a commercial side. To this end, the SUPRENUM Supercomputer GmbH was founded in Bonn. The SUPRENUM Supercomputer GmbH's charge was to manage the whole enterprise, to contribute to the software effort, to coordinate software developments, and to exploit and market the results of the project. The commercial goal required that companies with manufacturing expertise be involved. The research aspects required that various university and government research laboratories should participate. The final team consisted of about 15 groups from different institutions all over Germany, including several large companies as well as the small SUPRENUM Supercomputer GmbH.[1] They were[3]

The tasks were assigned the following:[2]

  • In the applications software area: DLR, Dornier GmbH, the GMD, the Kernforschungsanlage Jülich GmbH (KFA), the Kernforschungsanlage Karlsruhe GmbH (KfK), Kraftwerk Union AG and the University of Düsseldorf.
  • In the language level area: GMD, the Technical University at Darmstadt and the University of Bonn.
  • In the systems area: GMD, Krupp Atlas Elektronik GmbH, Stollmann GmbH, the Technical University at Brunswick and the University of Erlangen-Nuremberg.

While the research group on parallel numerical methods in Sankt Augustin provided the know-how for the applications (solving partial differential equations), the German Society for Mathematics and Data Processing GMD FIRST(German: Forschungszentrums für Innovative Rechnersysteme und -technologie, English: Research centre for innovative computer systems and technologies) in Berlin, provided the necessary know-how in hardware and operating system design. A total of 15 research groups in academic institutions across Germany were involved in the project. The involvement of the industry was limited to the production of hardware at Krupp Atlas Elektronik.

Only five systems were shipped.[4]

Since Jul 12, 2010 SUPRENUM Supercomputer GmbH ist defunct.[5]

After the end of the SUPRENUM project, Pallas GmbH[6] evolved out of the remains of SUPRENUM GmbH in 1991. In 2003, the company sold its high performance computing division to the Intel Corporation.

In contrast to the then ubiqituous, conventional vector computers (e.g. NEC SX architecture, Cray Y-MP), SUPRENUM-1 pursued as one of the first a massively parallel design. However, competitors like Thinking Machines Corporation were catching up fast.

Architecture[edit]

SUPRENUM-1 Supercomputer

The Suprenum-1 was designed as a massively parallel MIMD multi-computer system and it was based on a distributed hardware architecture.

It was scalable up to 256 computing nodes, organized into clusters. The nodes of a cluster were partitioned into five function units. From a total of 20 nodes, for the execution of application programs, 16 application nodes were available. One stand-by node served for fault-tolerant purposes. In addition to these application-oriented nodes, the disk node provided for disk i/o services and the diagnostic node provided for maintenance services. And finally, the inter-connection of different clusters, as well as the inter-connection to hast machines, is made feasible by the communication node, which actually serves as a gatew.y between cluster bus and SUPRENUM bus.[7]

The first release consisted of 320 nodes (256 application nodes and 64 maintenance nodes).

The main components of each application node were a 32-bit microprocessor Motorola 68020 operating at a clock rate of 20 MHz, 8 MByte of main memory, protected by 2-Bit error-detection and 1-Bit error-correction logic, and four coprocessors:[8]

  • The paged memory management unit (PMMU) Motorola 68851 checked access rights and page violation when the node memory was being accessed by the CPU or at the beginning of DMA.
  • The floating-point unit (FPU) Motorola 68882 executed scalar floating-point arithmetic.
  • The vector floating-point unit (VFPU) consisted of the Weitek chip set WTL2264/2265 and 64 KByte of fast static memory (vector cache). Peak performance was 10 MFlops for single-operation double-precision floating point computations, and 20 MFlops in the case of chained operations. Peak performance was achieved even if one of the two operands was being read from main memory by DMA, provided a constant increment was used.
  • The communication unit (CU) was a microprogrammable coprocessor which took care of the data transfer between a node's main memory and other nodes in the system. The CPU initiated the communication. The communication unit then handled the entire data transfer including bus request, transfer with protocol checks, and bus release. The functions of the communication unit were realized mainly by gate arrays and hybrid modules.

The net performance of each application node was specified with 4 Mflops. As a consequence, a net performance of 1 Gflops was calculated for the SUPRENUM release .

Image of a Suprenum-1 node

The 16 clusters were connected by a network of 200 Mbit/sec busses. The busses were arranged as a rectangular grid with 4 horizontal and 4 vertical busses (global busses). Each cluster consisted of 16 processors connected by a fast bus, along with I/O devices for communication to the global bus grid, to the disk and the host computers. There was a dedicated disk for each cluster. Individual nodes could deliver up to 20 Mflops (64-bit chained) or 10 Mflops (64-bit unchained) of computing power.[9]

The high bandwidth of the bus network made the Suprenum-1 an interesting machine for a wide range of applications, including those requiring long-range communication. No more than three communication steps were ever required between remote nodes. SUPRENUM supported a send/receive model of communication. The primary difference is that SUPRENUM Fortran was an extension of standard Fortran, in which task control and communication are incorporated into the language, rather than being implemented through library calls as on the iPSC. SUPRENUM also supports Fortran 90 array extensions which avail of the vector hardware. SUPRENUM software was characterized by the best support for scientific applications to be found among the various distributed memory MIMD vendors. The effort invested in development of libraries of high-level grid and communication primitives greatly eased the effort of moving applications to the computer, and also provides substantial high-level portability to other systems, since the communication library could be implemented in terms of low level primitives on any distributed system.[10]

Besides the hardware development, Suprenum-1 software was developed on many levels:

  • Operating System
  • Vectorizing Compilers
  • Message Passing
  • Applications

The operating system for Suprenum-1 was PEACE (Process Execution And Communication Environment), a new operating system developed specifically for the project. PEACE was designed from the start to support efficient low-latency message passing as weIl as multitasking. While PEACE appeared to be a satisfactory operating system, message latency never was as low as desired. Typical latency overheads are of order 1 millisecond. While asynchronous communication was a design goal for SUPRENUM, we were never able to overlap communication with computation on Suprenum-1 due to a mailbox conflict within PEACE.

As a major result, a rudimentary and "first-of-its-kind" Fortran compiler was developed. Based on Fortran 77, it already provided some features of the then upcoming Fortran 90 standard. It also used the PARMACS ("parallel macros") communication library. In contrast to the above mentioned FORTRAN compiler, PARMACS programming model is explicitly based on Message Passing. But again, funding for the project was stopped before the compiler had reached maturity. It transformed into the SUPERB[11] (SUprenum parallelyER Bonn) project ("Vienna Fortran").

Performance[edit]

The table[12] below provides a comparison of the Suprenum-1 with other MPP systems of its time:

System Number of nodes Peak Performance [Mflops]
Meiko CS-1 16 960
Suprenum-1 256 5120
Intel iPSC/860 128 7680
Thinking Machines Corp. CM-2 65536 24000
Thinking Machines Corp. CM-200 65536 32000
Thinking Machines Corp. CM-5 1024 131000
Kendall Square KSR-1 64 2560
Evans and Sutherland ES-1 32 640
Myrias SP-2 128 64

Review[edit]

Because of the high development cost of more than 160 million[13] Deutsche Mark and the lack of success in marketing, the project has been increasingly evaluated critically and compared with other unsuccessful research (Breeder reactor, Transrapid). Therefore, the Federal Ministry for Research and Technology waived the funding of the planned second phase of evolving into a commercial project. This decision stymied the commercial success because it denied a successor system on which potential customers could have relied. Continuity is an essential prerequisite for software development or applied industrial use.

In hindsight, especially the inadequate involvement of industry is being criticized. However, as a research project itself, SUPRENUM was successful. The participating institutions had acquired a well-respected expertise in parallel computing, which resulted in a European project GENESIS. PEACE served as an operating system for the non-profit MANNA architecture. SUPRENUM also influenced the development of other parallel computers such as the Meiko CS-2 which was an outcome of the European GENESIS project.

The SUPRENUM project has spun off many successful enterprises, e.g. GENESIS, SUPERB, Pallas GmbH, Manna, PPPE and RAPS. Pallas, in fact, can be seen as a continuation of all of the software aspects of SUPRENUM, and as such shows that this part of SUPRENUM was commercially successful. The GMD FIRST project Manna is similarly a continuation of the operating system and some of the architecture aspects of SUPRENUM, again very successful, although this time in a research environment.

Also the Meiko CS-2 machine, originally developed within GENESIS, involved many elements of the Suprenum-2 design from SUPRENUM, and indeed there were serious plans at one point to merge Meiko and SUPRENUM. Unfortunately, this concept was ultimately rejected by the shareholders of SUPRENUM GmbH, who at that time also decided to withdraw from SUPRENUM. Finally the applications' side of SUPRENUM evolved into GENESIS, later PPPE and RAPS, so that again this aspect of SUPRENUM has shown itself to be of long-term viability.

Taking into account all of these achievements across a broad spectrum of computing technology, one can only conclude that SUPRENUM was highly successful, even while not achieving all of the goals originally established by the government.

See also[edit]

References[edit]

  1. ^ a b SUPRENUM: Perspectives and Performance Oliver A. McBryan, 1994
  2. ^ a b FBIS Foreign Broadcast Information Service (Mar 30, 1987). "FRG's Suprenum: MIMD Architecture, Multilevel Principle" (pdf). Europe / Latin America Report - Science & Technology. Arlington VA: NTIC / JPRS. p. 8. JPRS-ELS-87-016. 
  3. ^ Schwerpunkte der Informatikforschung in Deutschland in den 80er Jahren Bernd Reuse, 2008 (German)
  4. ^ Massiv Paralleles Rechnen (Sendungsarchiv) May 12, 2008 at cczwei.de (German)
  5. ^ SUPRENUM Supercomputer at wirtschaft.ch
  6. ^ Homepage of Pallas GmbH
  7. ^ PEACE: A Distributed Operating System for High-Performance Multi-Computer Systems W. Schröder, 1989
  8. ^ Monitoring Program Behaviour on SUPRENUM M. Siegle et al., 1992
  9. ^ Scaling Performance of the Shallow Water Equations on the Suprenum-l Supercomputer Oliver A. McBryan, 1992
  10. ^ A Comparison of the Intel iPSC/860 and the Suprenum-1 Parallel Computers Oliver A. McBryan, 1990
  11. ^ Science&Technology Europe - FRG's "Suprenum" Supercomputer Sept 7, 1989
  12. ^ Parallel Processing and Scientific Applications C. Farhat and O. McBryan, 1992
  13. ^ Brochure of the German National Museum, Bonn

External links[edit]