|Industry||Software & Programming|
|Headquarters||Santa Clara, California|
|Key people||Ivan Pesic, founder
Iliya Pesic, chairman
David Halliday, CEO/former COO
Silvaco, inc. is a privately owned provider of electronic design automation (EDA) software and TCAD process and device simulation software. Silvaco was founded in 1984 by Dr. Ivan Pesic (September 13, 1951, Resnik, Montenegro — October 20, 2012, Japan). It is headquartered in Santa Clara, California with 11 offices worldwide, and in 2006 the company had about 250 employees worldwide.
Silvaco provides analog semiconductor process, device and design automation solutions in CMOS, bipolar, SiGe and compound technologies. Customers include leading fabless semiconductor companies, integrated semiconductor manufacturers, foundries, and universities worldwide.
Founded by Dr Ivan Pesic in 1984, the company is privately held, internally funded, debt-free, and owns all of its office buildings. It is headquartered in Santa Clara, California, with eight offices worldwide including US offices in Austin, Texas, North Chelmsford, Massachusetts, and Phoenix, Arizona.
Ivan Pesic was the founder of the company, and also its president and CEO until his passing away from cancer in 2012. The successor CEO is David Halliday.
|Industry||Software & Programming|
|Headquarters||Santa Clara, California|
|Key people||Dr Ivan Pesic,
Simucad was formed in 1981 with pioneering business in Verilog simulation. It was acquired by HHB Systems, which in its turn was acquired by Daisy Systems in 1980s. In early 1990s Simucad was spun off as a management buyout. 
In June 2004, Simucad was incorporated in Delaware in June 2004 as a spin-off from Silvaco Data Systems, and plans for IPO were announced. Simucad acquired ownership all of Silvaco's simulation and CAD products and intellectual property, most notably the SmartSpice circuit simulator. As of March 1, 2010, Simucad Design Automation and Silvaco Data Systems have merged to form Silvaco, Inc.
Silvaco delivers EDA and Stanford-based TCAD products with support and engineering services to provide semiconductor process and device simulation solutions. Worldwide customers include leading foundries, fabless semiconductor companies, integrated semiconductor manufacturers, universities, and semiconductor designers.
- Process Simulation
- Victory Process is a 3D Process Simulator. It includes a process flow core simulator and three advanced simulation modules: Monte Carlo Implant, Advanced Diffusion and Oxidation, and Physical Etch and Deposit.
- Victory Cell is a 3D Process Simulator for Large Structures. It is suitable for CMOS image sensors, TFT arrays, power devices, and other large geometry structures.
- Athena is a group of process simulation products that enables process and integration engineers to develop and optimize semiconductor manufacturing processes. ATHENA provides a platform for simulating ion implantation, diffusion, etching, deposition, lithography, oxidation, and silicidation of semiconductor materials. It replaces costly wafer experiments with simulations.
- Athena 1D 1D Process Simulator is a 1D mode of operation of the industry standard Athena 2D Process Simulator.
- Device Simulation
- Victory Device is a general-purpose 3D device simulator using a tetrahedral meshing engine for fast and accurate simulation of complex 3D geometries.
- Atlas is a group of device simulation products enables device technology engineers to simulate the electrical, optical, and thermal behavior of semiconductor devices. It provides a physics-based, modular, and extensible platform to analyze DC, AC, and time domain responses for all semiconductor based technologies in 2 and 3 dimensions.
- Stress Simulation
- Victory Stress is a generic 3D stress simulator designed to calculate stresses and mobility enhancement factors for any 3D structure using comprehensive material stress models.
- Other tools
- Interactive Tools, a suite of pre and post processing tools that provide interactive GUI-based pre and post processing services to Silvaco’s 1D, 2D and 3D TCAD simulators.
- Virtual Wafer Fab or "VWF" is a group of TCAD products that automate and emulate physical wafer manufacturing. These tools facilitate the input, execution, run-time optimization, and results processing of TCAD simulations into a flow managed through a common database. It can be used for such tasks as designing more efficient solar cells for use in space.
The company supplies integrated EDA software in the areas of Analog/Mixed-Signal/RF, Custom IC CAD, Interconnect Modeling, and Digital CAD.
- Analog/Mixed-Signal/RF products
- Utmost III SPICE modeling software generates SPICE models for analog, digital, mixed-signal, and RF applications.
- Utmost IV optimization module provides a database-driven environment for the generation of SPICE models and macro-models for analog, mixed-signal and RF applications.
- Spayn, meaning Statistical Parameter and Yield Analysis, is a statistical modeling tool for analyzing variances from model parameter extraction sequences, electrical test routines, and circuit test measurements.
- Gateway is a schematic editor. It is a front end for Silvaco's Analog/Mixed Signal/RF IC Design Platform, and is integrated with the company's circuit simulation, layout, DRC/LVS/LPE, and parasitic extraction tools.
- SmartSpice is an analog circuit simulator used in the design of analog circuits and analog mixed-signal circuits. It can analyze critical nets and characterize cell libraries.
- SmartSpice RF is a harmonic balance based RF simulator. It provides a set of steady-state large-signal analyses and measurements to design GHz range RF ICs driven with multi-tone sources.
- Harmony is an analog and mixed-signal circuit simulator. It simulates circuitry expressed in Verilog, SPICE, Verilog-A and Verilog-AMS, and dynamically links in the capabilities of the SmartSpice Circuit Simulator and SILOS Verilog Simulator at run time.
- Verilog-A is a language for SmartSpice. Compiled or interpreted Verilog-A language combined with SmartSpice provides designers with an environment for the design and verification of analog and mixed-signal circuits.
- Custom IC CAD
- Expert is a layout editor. It offers layout viewing, editing features, and scripting for automation with parameterized cells (PCells).
- Guardian is a suite of DRC/LVS/LPE physical verification products. They provide verification of analog, mixed signal and RF IC designs, perform design rule checks (DRC), layout vs. schematic (LVS) comparisons, and layout parameter extractions (LPE).
- Hipex is a set of full-chip parasitic extraction products. They perform extraction of parasitic capacitors and resistors from hierarchical layouts into hierarchical transistor-level netlists using nanometer process technology.
- Interconnect Modeling
- Quest is a high frequency parasitic extractor. It calculates 3D frequency-dependent inductance, resistance, capacitance and capacitive loss for any multi-port network for RF SPICE analysis.
- Clever is a physics-based parasitic extractor. It uses 3D field solvers to convert the mask data of a cell and relevant process information into a SPICE netlist. This process removes inaccuracies resulting from traditional, rule-based parasitic extractors.
- Stellar is a core parasitic extractor. It fills the circuit size gap between typical small cell solvers and full chip extractors.
- Exact is a full chip LPE rule file generator
- Digital CAD
- Silos is an IEEE-1364-2001 compliant Verilog simulator. It offers debugging features in a design environment for FPGA, PLD, ASIC, and custom digital designs.
- HyperFault is an IEEE-1364-2001 compliant mixed-level fault simulator that analyses test vectors’ ability to detect faults.
- AccuCell is a characterization and modeling tool that characterizes and validates standard cell libraries, I/Os, and custom cells.
- AccuCore provides transistor and gate level full-chip STA with automatic block characterization.
- Catalyst AD is a SPICE Netlist to Verilog Gates Converter
- Catalyst DA is a Verilog Netlist to SPICE Netlist Converter
- Spider provides a place and Route Design Flow
Process Design Kits (PDKs)
Silvaco offers process design kits (PDKs) for analog, mixed-signal and RF design teams. These are collections of verified data files that are used by a set of custom IC design EDA tools to provide a design flow. Such data files include schematic symbols, parameterized cells (PCells), DRC/LVS runsets, parasitic extraction runsets, and scripts to automate the generation and verification of design data.
Foundry process-specific models, symbols, and rule decks are integrated and tested with Silvaco custom IC design tools and PCells to create an AMS/RF design environment.
Silvaco has been involved in litigation against such companies as Circuit Semantics, Inc. (CSI), Technology Modeling Associates, MetaSoftware and Avanti Corporation for theft of trade secrets. Silvaco won a $20 million judgment from Avanti just prior to the latter company's acquisition by Synopsys. In 2008, legal action by Silvaco against Cypress Semiconductor, Inc. led the California Court of Appeal to make a ruling clarifying when the statute of limitations for theft of trade secrets begins. The ruling stated that "statute of limitations on a cause of action for misappropriation begins to run when the plaintiff has any reason to suspect that the third party knows or reasonably should know that the information is a trade secret."
- "Silvaco Founder and CEO Dr Ivan Pesic Succumbs to Cancer"
- Goering, Richard (2004-06-07). "Mixed-signal simulation tool supports Linux". EE Times. Retrieved 2010-04-13.
- Valco, George. "Getting Started with the Silvaco TCAD Software for EE637 and EE734". Retrieved 2010-04-13.
- "In Memory of Ivan Pesic of Silvaco (1951 - 2012)", John Cooley, DeepChip, ESNUG 510 Item 5
- "Simucad spins out of Silvaco with eye toward IPO", Michael Santarini, 09 January 2006, Electronics Weekly
- Richard Goering (2003-10-10). "Silvaco buys EDA pioneer Simucad". EE Times. Retrieved 2010-02-25.
- EETimes.com - Simucad spins out from Silvaco, plans IPO in '06
- "Elpida Standardizes on Simucad's SmartSpice Analog Circuit Simulator". Reuters. 2008-01-23. Retrieved 2009-03-04.
- Fuller, Dr. Lynn (2010-03-10). "2D Process Modeling with Silvaco ATHENA". Retrieved 2010-04-13.
- McCloy, Darin J. (1999). High Efficiency Solar Cells: A Model in Silvaco (Spiral-bound). ISBN 978-1-4235-4151-6.
- Goering, Richard (2002-11-06). "Silvaco vs. CSI trade secrets case headed to trial". EE Times. Retrieved 2010-04-13.
- Santarini, Mike (2004-05-25). "Silvaco lawsuits cloud Circuit Semantics' future". EE Times. Retrieved 2010-04-13.
- Stickel, Amy I. (2008-08-01). "Court Clarifies Statute of Limitations for Trade Secrets". InsideCounsel. Retrieved 2010-04-13.
- "Effective Trade Secret Protection: Speed is of the Essence". Jackson Lewis LLP. 2008-06-16. Retrieved 2010-04-13.[dead link]
- Firm, Weintraub (2009-01-30). "Third Party Trade Secret Misappropriation and the Statute of Limitations". Retrieved 2010-04-14.