|Created||Launch anticipated at the Intel Developer Forum (IDF) on 15 August 2015|
|Transistors||14 nm transistors|
|Instructions||MMX, AES-NI, CLMUL, FMA3|
Skylake is the codename used by Intel for a processor microarchitecture under development and due to launch in 2015 as the successor to the Broadwell microarchitecture. In accordance with Intel's tick-tock principle, Skylake will initially be released in a 14 nm manufacturing process; as a "tock" step in the "tick-tock" release cycle, Skylake should be completely redesigned, bringing greater CPU and GPU performance, and reduced power consumption. Manufacturing process is expected to make a transition to 10 nm in 2017; the codename for this 10 nm die shrink is "Cannonlake".
Skylake's release to market is expected to take place at the Intel Developer Forum (IDF) on 15 August 2015, unusually soon after Broadwell's. While industry observers initially believed that the issues impacting Broadwell would also affect Skylake, newer information suggests that Intel will be seeking to recover by maintaining the traditional "tick-tock" cadence for Skylake and shortening Broadwell's release cycle instead.
Like its predecessor, Broadwell, Skylake is expected to become initially available in four variants, identified by the suffixes "S" (SKL-S), "H" (SKL-H), "U" (SKL-U), and "Y" (SKL-Y). An overclockable "K" variant with unlocked multipliers is expected to launch at the same time. The H, U and Y variants will be manufactured in ball grid array (BGA) packaging, while the S variant will be manufactured in land grid array (LGA) packaging using a new socket, LGA 1151. Skylake will be used in conjunction with Intel 100 Series chipsets, also known as Sunrise Point.
The major expected changes between the Haswell and Skylake architectures include the abandonment and removal of the fully integrated voltage regulator (FIVR) introduced with Haswell, and the integration of the Platform Controller Hub (PCH) onto the die for Skylake's H, U and Y variants, effectively following a system-on-chip (SoC) design layout. The S variant will remain a two-chip design. On the variants that will use a discrete PCH, Direct Media Interface (DMI) 2.0 will be replaced by DMI 3.0, which promises speeds of up to 8 GT/s.
Skylake's U and Y variants will support one DIMM slot per channel (of type LPDDR3 only, for the models announced as of June 2014), while H and S variants will support two DIMM slots per channel. Skylake's launch and sales lifespan occur at the same time as the ongoing SDRAM market transition related to a dropoff in the DDR3 SDRAM memory as it gradually becomes replaced by the DDR4 memory. Rather than working exclusively with DDR4, the Skylake microarchitecture is expected to remain backward compatible by interoperating with both types of memory. Accompanying the microarchitecture's support for both memory standards, a new SO-DIMM type capable of carrying either DDR3 or DDR4 memory chips, called UniDIMM, was also announced.
Other expected enhancements include PCI Express 4.0 support on the "-E" (extreme) version (for which the release is expected in 2017), Thunderbolt 3.0, SATA Express, Iris Pro graphics with Direct3D feature level 12.0 with up to 128 MB of L4 eDRAM cache on certain SKUs. The Skylake line of processors is expected to retire VGA support, while supporting up to five monitors connected via HDMI, DisplayPort or Embedded DisplayPort (eDP) interfaces.
Instruction set enhancements are also expected as with most microarchitecture releases; the Skylake instruction set changes include Intel MPX (Memory Protection Extensions) and Intel ADX (Multi-Precision Add-Carry Instruction Extensions). The Xeon variant will also have Advanced Vector Extensions 3.2 ("AVX-512F") and Intel SHA Extensions (for SHA-1 and SHA-256 Secure Hash Algorithms).
Intel also announced that the Skylake-based laptops will be using wireless technology called Rezence for charging, and other wireless technologies for communication with peripherals. All major PC vendors have agreed to use this technology in Skylake-based laptops, which should be released by the end of 2015.
Integrated GPU of the Skylake's S variant will support DirectX 12, OpenGL 4.4 and OpenCL 2.0 standards, as well as some modern hardware video encoding/decoding algorithms such as VP9, VP8 and HEVC.
- 14 nm manufacturing process
- LGA 1151 socket
- Z170/H170 chipset (Sunrise Point)
- Thermal design power (TDP) up to 95 W (LGA 1151)
- Support for both DDR3 SDRAM and DDR4 SDRAM in mainstream variants, using custom UniDIMM SO-DIMM form factor with up to 64 GB of RAM on LGA 1151 variants.
- Support for 20 PCI Express 3.0 lanes (LGA 1151)
- Support for PCI Express 4.0 (Skylake-E/EP/EX)
- Support for Thunderbolt 3.0 (Alpine Ridge)
- 64 to 128 MB L4 eDRAM cache on certain SKUs
- Up to four cores as the default mainstream configuration
- Support for SATA Express
- AVX-512 F, CDI, VL, BW, and DQ for the Xeon variants
- Intel SHA Extensions: SHA-1 and SHA-256 (Secure Hash Algorithms) for the Xeon variants
- Intel MPX (Memory Protection Extensions)
- Intel ADX (Multi-Precision Add-Carry Instruction Extensions)
- Skylake's integrated GPU supports Direct3D 12 at feature level 12.0
Skylake processors will be produced in four main families: Y, U, H and S. Multiple configurations will be available within each family:
- Integrated L4 eDRAM cache will be available with various Skylake-U, H and S configurations.
- The S variant is intended to be the main socketable desktop Skylake, and will have configurable thermal design power (cTDP); this allows certain Skylake chips to switch their operation between 35 W and 65 W modes.
- A high-performance 95 W TDP Skylake-S chip will be available, but only without the eDRAM L4 cache.
- Y, U and H chips are intended for mobile or embedded systems that require lower power consumption.
- Y and U variants will support only low-power DDR3 SDRAM, while DDR4 SDRAM will also be supported by H and S variants.
|SKL-Y-1||2||GT2||LPDDR3 1600 MHz||N/A||4 W|
|SKL-U-1||2||GT2||LPDDR3 1600 MHz||N/A||15 W|
|SKL-U-2||2||GT3e||LPDDR3 1600 MHz||64 MB||28 W|
|SKL-H-1||4||GT2||DDR4 2133 MHz||N/A||35 W|
|SKL-H-2||4||GT4e||DDR4 2133 MHz||128 MB||45 W|
|SKL-S-1||2||GT2||DDR4 2133 MHz or DDR3L/DDR3L-RS 1600 MHz||N/A||35–65 W|
|SKL-S-2||4||GT2||DDR4 2133 MHz or DDR3L/DDR3L-RS 1600 MHz||N/A||95 W|
|SKL-S-3||4||GT4e||DDR4 2133 MHz or DDR3L/DDR3L-RS 1600 MHz||64 MB||35–65 W|
In September 2014, Intel announced Skylake microarchitecture at the Intel Developer Forum in San Francisco. Intel announced that volume shipments of Skylake CPUs are scheduled for the second half of 2015. Also, Skylake development platform is announced to be available in H1 2015. During the announcement, Intel also demonstrated two computers with desktop and mobile Skylake prototypes; the first one was a testbed system, running the latest version of 3DMark, while the second computer was a laptop, playing 4K video.
An unusual feature of Skylake's release timing is that it follows very closely on the release of its predecessor, Broadwell, which had suffered from launch delays. Intel commented in 2014 that moving from 22 nm (Haswell) to 14 nm (Broadwell) had been "their most difficult process to develop yet", causing Broadwell's planned launch to slip by several months; yet, the 14 nm production was back on track and in full production as of Q3 2014. Industry observers had initially believed that the issues impacting Broadwell would also cause Skylake to slip to 2016, but newer information suggests that Intel would seek to recover from these delays by bringing forward Skylake's release and shortening Broadwell's release cycle instead.
Accordingly, it is believed that Broadwell will have an unusually short run, although unlocked multiplier versions of Broadwell ("K" SKUs) are still expected to be released in parallel with Skylake in 2015. (Extreme or unlocked versions of a number of Ivy Bridge and Haswell variants had previously also been released with staged timing and in parallel with their successors' initial release).
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