SuperSPARC

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SuperSPARC
KL TI SuperSPARC.jpg
The SuperSPARC microprocessor
Produced From 1992 to 1995
Designed by Sun Microsystems
Max. CPU clock rate 33 MHz to 90 MHz
Instruction set SPARC V8
Cores 1

The SuperSPARC is a microprocessor that implements the SPARC V8 instruction set architecture (ISA) developed by Sun Microsystems. 33 and 40 MHz versions were introduced in 1992. The SuperSPARC contained 3.1 million transistors. It was fabricated by Texas Instruments (TI) at Miho, Japan in a 0.8 micrometre BiCMOS process. There were two derivatives of the SuperSPARC: the SuperSPARC+ and SuperSPARC-II. The SuperSPARC+ was developed to remedy some of the design flaws that limited the SuperSPARC's clock frequency and thus performance. The SuperSPARC-II, introduced in 1994, was a major revision with improvements that enabled the microprocessor to reach 80 MHz in desktop systems and 90 MHz in the more heavily cooled SPARCserver-1000E. The SuperSPARC-II was replaced in 1995 by the 64-bit UltraSPARC, an implementation of the 64-bit SPARC V9 ISA.

Name (codename) Model Frequency (MHz) Arch. version Year Total threads[1] Process (µm) Transistors (millions) Die size (mm²) IO Pins Power (W) Voltage (V) L1 Dcache (k) L1 Icache (k) L2 Cache (k) L3 Cache (k)
SuperSPARC I (Viking) TI TMX390Z50 / Sun STP1020 33–60 V8 1992 1×1=1 0.8 3.1 -- 293 14.3 5 16 20 0-2048 none
SuperSPARC II (Voyager) Sun STP1021 75–90 V8 1994 1×1=1 0.8 3.1 299 -- 16 -- 16 20 1024-2048 none
Sun SuperSPARC II die shot

References[edit]

  1. ^ Threads per core × number of cores
  • "TI SuperSPARC for Sun Station 3 in production". (11 May 1992). Electronic News.
  • DeTar, Jim (10 October 1994). "Sun sets SuperSPARC-II as UltraSPARC V9 bridge". Electronic News.