Talk:DEC Alpha

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What are those ISA addition letters?[edit]

What do the different ISA letters stand for? Also, the entire table could use a chart, for those who might not immediately recognize that "BSide" equals "Backside."

MSTCrow 00:56, Jun 4, 2004 (UTC)

The letters in "ISA" stand for "instruction set architecture". The letters in the abbreviations for the various extensions to the Alpha ISA stand for what the section titles say they do, e.g. "Byte Word eXtensions" for BWX, "Motion Video Instructions" for MVI, etc. Guy Harris (talk) 02:50, 13 March 2014 (UTC)

Who architected the Alpha?[edit]

"The Alpha project's main computer architects/designers were Rich Witek, Dick Sites, and Trygve Fossum."

What exactly was Trygve Fossums involvement with Alpha? Is it correct to credit him as main architect/designer?


Disambig reference re: AXP is unnecessary[edit]

I removed the blurb discussing the abbreviation AXP and two of its other interpretations because:

  • the page AXP in fact does not redirect here. Rather, that page is a proper disambiguation page that mentions each of the alternatives; and
  • there is no likelihood of confusion, since as mentioned, AXP is a disambig page, and further since the name of this page—"DEC Alpha"—does not even include the string "AXP."

Ryanaxp 15:04, Jun 22, 2005 (UTC)


Someone just changed the Multia from a 21068 to a 21066. If the 21066 was named LCA ("Low Cost Alpha"), then IIRC, that's correct 'cause Multia used LCA as did at least one Single Board Computer built by DEC.

Atlant 16:55, 12 July 2006 (UTC)

21068 was also called LCA4, like 21066. DEC Multia service manual lists 233 MHz Multia as having a 21068, but 21068 was only rated at 66 (sic) MHz according to data sheet, so presumably 233 MHz Multia chip was a 21066A. Letdorf 16:59, 12 July 2006 (UTC).


Hi, all.

I am new to Wikipedia... so if I commit a fox pass, please forgive.

Do the production versions of the Alpha support Epicode?

I am an embedded systems designer and I read with great interest an article in Byte Magazine years ago speaking to the ability of the Alpha to take on any instruction set, not just that of the VAX with Epicode. I was trhilled and thought this was indeed the computer architeture to take DEC 25 more years. Want to make a CDC6600? No Problem!

Time passed and the Alpha came out, but when I received an Alpha Data Book, it was not spoken about, nor have I seen anything in the press since the Byte article which preceded (if memory serves) the release said nothing about Epicode.

Can anyone tell me if the Epicode architecture was actually implemented?

Broh. (Broh-dot)

AFAIK, Epicode was a DEC PRISM thing. Epicode evolved into PALcode on the Alpha, which was only used to hide differences between platforms and processor variants (ie. a kind of hardware abstraction layer) and not to completely redefine the instruction set. Letdorf 10:03, 25 July 2006 (UTC).
And I suspect Epicode wasn't much more than PALcode was; a certain range of Prism instructions would trap into a special Epicode mode, with its own register set (so you don't have to save registers when entering Epicode or restore them when leaving Epicode) and perhaps with some special Epicode-mode-only processor-dependent instructions letting you do stuff, on that particular processor, that you couldn't do in regular code. A given Epicode instruction might be available on all Prism processors, but would trap to a different Epicode routine on different processors. (I think late System/390 processors, and z/Architecture processors, have a similar concept, called millicode.)
I doubt that Epicode was at all involved in the instruction decoding stage, so you couldn't make the processor support an arbitrary new instruction set. The Byte article might have claimed that, but it may have been written by somebody who completely misunderstood what Epicode was. Guy Harris (talk) 22:08, 27 December 2013 (UTC)
Either that, or they were talking about FX!32, which implemented other instruction sets by translating machine code from those instruction sets to native Alpha instructions and running the generated Alpha code on the hardware. That, however, is not a concept unique to Alpha; binary translation has been used on a number of source and target instruction sets. Guy Harris (talk) 22:16, 27 December 2013 (UTC)
And the PRISM System Reference Manual's discussion of Epicode makes it sound very much like PALcode, and that manual explicitly says that PRISM does NOT provide a VAX compatibility mode. It says that Epicode can be used to implement some PRISM instructions, and that whether a particular instruction is directly implemented in hardware or traps to Epicode is processor-dependent. Guy Harris (talk) 02:46, 13 March 2014 (UTC)


Do we have any references for the existance of a 21466 variant of the EV8? Letdorf 10:24, 25 September 2006 (UTC).

Re: Tryggve Fossum

While he was/is a respected and significant contributor to Alpha, the two architects of Alpha were Dick Sites and Rich Witek. Ref: The AARM (Alpha Architecture Reference Manual)

Also, the main page references "Tarantula". The code name for EV-8 was Arana (tilde over the 'n') as in spanish for spider. That was because it was envisioned as an 8-way machine. Ref: personal knowledge.

Qualifications of personal knowledge: I was part of AMT (Alpha Migration Tools) (various binary translator products) from 1992 - 2000 when I left the company. AMT was initially a subgroup of the AD (Advanced Development) organization of Digital Semiconductor. 17:53, 29 June 2007 (UTC) Rick Gorton (gorton at no spam dot theworld dot com)

CPU Table[edit]

The CPU table contains a few errors and unverified or assumed information.

Firstly, the bandwidth figures listed for the Alpha are wrong. Instead of stating the bandwidth of the Alpha's data bus, the bandwidth of the computers which used an Alpha CPU was used stated instead. This is misleading as it states bandwidths of the computers, not the Alpha, which is what this article is about.

Secondly, I have found no credible evidence supporting the values for the cancelled 21464 CPUs. The values in the table seem to be assumptions or speculations based on the specifications of previous models. If I am wrong, and there are credible sources for these values, they should have links in the references section. Rilak 16:42, 17 September 2007 (UTC)

As I have mentioned before, the memory bandwidths listed in the table do not add anything to the table of Alpha processors. The given figures I suspect, are the memory bandwidths of computers using the Alpha chip. It should be changed to state the system bus width and speed, or removed since its misleading. Any comments before I begin in a few days? Rilak (talk) 22:27, 16 February 2008 (UTC)

Article title[edit]

Should this article be renaming to "Alpha (architecture)" or something similar? "DEC Alpha" is not what the architecture or the microprocessors was called and I think for the sake of accuracy, the title should reflect this. All over Wikipedia, there are instances where articles refer to the Alpha architecture or Alpha microprocessors as "DEC Alpha". This is simply just plain wrong. If the company behind the architecture or microprocessor must be stated, "DEC" and "Alpha" should be separately linked. Take a look at MIPS architecture. You don't see it being called "MIPS MIPS", "MIPS Computer Systems MIPS" or "SGI MIPS" do we? It is a good example of how much better such a scheme (<name> architecture) is. Comments? Rilak (talk) 13:39, 22 August 2008 (UTC)

Well, it tells me almost nothing about the actual architecture, instead we're expected to go to an external website for the very basics. Compare articles on other CPUs which talk about numbers of registers, addressing modes etc etc. Lovingboth (talk) 16:06, 22 August 2008 (UTC)
Yes, the article does not describe the architecture in any meaningful way. However, articles that link to "DEC Alpha" seem to expect that it does discuss the architecture. I am willing to expand the article to include basic architectural features. Even if the article were not to be about the architecture, it is still incorrectly named as Digital never called implementations "DEC Alpha 21x64". I understand that "DEC" is in the title because "alpha" refers to the letter, but it seems to cause confusion - people seem to think that this is what it was called. Rilak (talk) 11:38, 23 August 2008 (UTC)
Yes, the article couldn't really be called simply "Alpha", as there are many, many articles about things called "Alpha" in WP. In Category:Microprocessors, there are several articles with names of the form "(vendor) (device)", so IMHO, "DEC Alpha" isn't totally unreasonable for this article, even if this exact phrase wasn't used in official documentation. If it were to be renamed, I'd suggest "Alpha (microprocessor)". Letdorf (talk) 11:57, 25 August 2008 (UTC).
I agree that the title "DEC Alpha" isn't totally unreasonable for a microprocessor as many articles use this scheme. The problem arises when there is some confusion with Alpha the ISA, Alpha the implementations and the correct naming conventions. Intel or AMD processors using such as scheme don't seem to have such confusion. Renaming the article ought to be able to clarify things. For example, some articles refer to the architecture as "DEC Alpha" as if this was its proper name:
* Portable Executable - "Prior to Windows 2000, Windows NT (and thus PE) supported the MIPS, DEC Alpha, and PowerPC instruction set architectures."
* ARM architecture - "DEC licensed the ARM6 architecture (which caused some confusion because they also produced the DEC Alpha) and produced the StrongARM."
From the text in boldface, we can see that there is clearly confusion as to what the architecture and the implementations are called. The first example confuses the name of the architecture while the second example confuses the name of the implementations. In contrast, instances of "MIPS" is not referred to as "MIPS architecture", even though "MIPS" links to an article with that title. This is confusion, I think, may be caused by Digital prefixing "DEC" to the names of some of their technology and products, such as DECnet, DEC 2000 AXP, DECstation. These articles are named correctly, but this one is not, so I think that "DEC" should not be part of the title at all as it is misleading.
I am not too sure about the precision of "Alpha (microprocessor)" as I think it places emphasizes on the implementations more than the architecture. While this is an accurate assessment of the article in its present state, it may give the impression that the article is for discussing the implementations and not the architecture, which may lead to difficulties in the future when expansions increase the coverage on the architecture (some editors may remove such content, justifying their actions through by the title). "Alpha (architecture)" I think is a better choice, mostly because of the MIPS article. Of course, there might be better names, and I think that if there are, we should put them on the table. Rilak (talk) 13:11, 25 August 2008 (UTC)
How pedantic do we need to be about distinguishing the Alpha architecture from its implementations? AFAIK all implementation were designed in-house and the evolution of the architecture was bound tightly to the development of the implementations. Also note that some WP article titles that are disambiguated with an "(architecture)" suffix are actually about architecture :-) Letdorf (talk) 12:04, 3 September 2008 (UTC).
Perhaps it would be would be better to tweak the introduction and the article to distinguish the architecture from the implementations. I think it is important because the Alpha architecture was clearly defined as different from the implementation. The issue of the Digital Technical Journal that introduced the Alpha (Winter 1992 I think) had a section about how decoupled the architecture was from the implementations. Rilak (talk) 12:53, 3 September 2008 (UTC)
Yes, I'd second that. Letdorf (talk) 14:20, 3 September 2008 (UTC).


There was an EV69, but it was mostly just a stepping stone to the EV7. There is surprisingly very little web info on it. It used a 0.13 process. I think IBM did the fabbing. VMS Mosaic (talk) 17:55, 5 September 2008 (UTC)

I went through the Alpha Architecture Reference Manual again and found the 21264/EV69A mentioned in Appendix D - Registered System and Processor Identifiers, but I didn't notice it before because Compaq placed it after the 21364/EV7 (yes, it is a bad excuse, my bad). I did search of the entire document, and that was the only reference to this elusive variant. I did a basic search through USENET and it appears that it was clocked at 1.5 GHz and had 1.75 MB of B-cache on-die, which is suspiciously similar to the 21364/EV7, except for the higher clock frequency. A search of USENET, uncovered some interesting threads at Red Hat, and from those postings, it appears that the only "authoritative" source supporting the existence of the EV69 is The Inquirer, which claims that one of their "sources" told them that the EV69 would be introduced "in late September". Since The Inquirer is not exactly the Microprocessor Report and becuase no sources support the existence of an Alpha clocked higher than 1.3 GHz or a system using the EV69, I think we can safely say that this may have been a non-commercial model (prototype, testing, demonstration, etc - like the EV3) or it may have been cancelled. Anyways, I'll look further into this just to make sure, but the later Alpha models are a mess with Compaq/HP, API, Samsung and IBM involved. Rilak (talk) 06:10, 6 September 2008 (UTC)
Well, here is a link to the article from The Inquirer. The article actually claims that it was supposed to be clocked at 1.2 GHz, not 1.5 GHz. I'm still not buying it though, The Inquirer is more well known for their friction-causing reporting than factually-correct and properly cited reporting. Rilak (talk) 06:20, 6 September 2008 (UTC)
Further research has resulted in and Rilak (talk) 06:51, 6 September 2008 (UTC)
I made another attempt at searching the web, but found not much more. I believe that a large part of the problem is that around that time Compaq became inconsistent in how they referred to their chips. At this point I guess it should not be mentioned here. VMS Mosaic (talk) 18:27, 6 September 2008 (UTC)
I think there's enough evidence in the Primeur article, here and here to suggest that the EV69 was an IBM-fabbed 0.13 μm SOI die-shrink of EV6 intended for 1.4 - 1.5 GHz that didn't make it to production. Other details are sketchy, but I don't think it woul be unreasonable to mention it in the "Cancelled" section of the table. Letdorf (talk) 00:50, 7 September 2008 (UTC).
A firmware readme at HP mentions the EV69 as being used in the ES40 and TS20/TS40 servers, but I don't recall seeing the EV69 ever mentioned in any literature discussing these systems. I think it should be mentioned in the "Cancelled" section of the table, but with proper references. Rilak (talk) 07:21, 8 September 2008 (UTC)
I think this is a typo for EV68 - earlier in the document, it refers to different SRM firmware for EV6 and EV67/68 systems. Letdorf (talk) 09:27, 8 September 2008 (UTC).

Scache vs. Bcache[edit]

The table shows scache and bcache -- what's the difference? Is one off-chip, one on? Thanks! Brianski (talk) 01:14, 22 October 2008 (UTC)

Yes, you are correct. In the case of the Alpha 21164 and 21364, the S-Cache refers to the L2 cache, which was on-die. The B-Cache refers to the L2 cache in models which did not have an on-die L2 cache or the L3 cache in the case of the Alpha 21164. Rilak (talk) 06:00, 22 October 2008 (UTC)

Actually, EV8/Arana survived Compaq sale, but for how long?[edit]

The article says "The unproduced EV8 would have been the first to include simultaneous multithreading, but this version was caught up in the sale to Compaq."

This is not correct, as EV8/Arana (with a ~ over the n) development kept on going just fine (I did verification on the F-Box) after the formation of Comical (Compaq+Digital...). But I left a year left later, and quite some time after that I read that the current state of EV8 development was being sold to Intel along with other Alpha IP and Alpha engineers (funny newspaper photo showed Tryggve Fossum and others walking with arms a-swinging, as if from one office to another). So one might assume that pieces of EV8 ended up in future Intel processors.

But can anyone put a more precise date on the end of EV8? "caught up in the sale to Compaq" is just way off. (talk) 19:05, 1 May 2009 (UTC)

I agree that sentence needs clarified, but later on in the article it is stated that the cancelation of EV8 was announced by Compaq in June 2001, which is confirmed by this paper. Letdorf (talk) 22:47, 1 May 2009 (UTC).
Compaq made the announcement on 25 June 2001, I believe. Rilak (talk) 23:49, 1 May 2009 (UTC)

Proposal to remove content[edit]

I have attempted to improve the article by describing the architecture instead of the implementations. As part of this refocus, I propose that the three images in the lede, the "Performance" and "Alpha-based systems" be removed. The rationale for these proposed changes is that they do not further one's understand of the ISA. One does not find in Appendix C: A Survey of RISC Architectures for Desktop, Server and Embedded Computers of Computer Architecture: A Quantitative Approach photographs of implementations and descriptions of where implementations are used. This information is better presented in the articles about the implementations such as Alpha 21064, Alpha 21164, Alpha 21264 and Alpha 21364. (Please note that derivatives of each generation are described in the same article). Much of the information that I propose be removed is already present in more appropriate articles. Rilak (talk) 06:47, 4 June 2009 (UTC)

DEC/Intel lawsuit[edit]

Do we want a section discussing Dec suing Intel for IP violations? IIRC that was quite the dustup in 1997 or thenabouts; I have always wondered if part of HP selling the Alpha IP to Intel after aquiring it was to entirely put any remaining pending legal process to bed. (talk) 17:46, 13 October 2010 (UTC)