Talk:Data General Nova
Proposed Technical Comments and Corrections
Some comments regarding the current Nova Wikipedia entry for discussion...
1) The Eclipse MMPU did not have virtual memory capabilities; insufficient information was saved in certain circumstances to restart an instruction or to fully restore the original pre-fault state. This was addressed by the non-standard MMPU of the M-600 Eclipse, but this product did not receive significant "market reception"
2) The Nova 4 did not have bank switched memory - its MMPU (Memory Map and Protection Unit) was compatible with the Nova 3 (although implemented in microcode rather than on a separate MMU/MMPU board as on the Nova 3).
3) The Nova was hugely popular in more places than just "labs around the world", a comment that does not fully reflect the breadth of applications handled by this incredible machine.
4) The original Nova's memory cycle time is 2.6 microseconds, not 1.2 microseconds as described.
5) The Nova 1200 series can not use core boards from an original Nova.
6) The Nova 1200 was the first DG single-board processor design, and it also used a 4-bit "nibble" design similar to the original Nova.
7) The Nova 1220 has 10 slots, not 14. The Nova 1230 has 15 slots (this is/was sometimes called the Nova 1200 Jumbo).
8) The Nova 840 (and later the 830) memory map had no "An index offset the base address into the larger 128 kWord memory" concept. A logical program address space of 32KW is maintained for the Nova 830/840 map, and its fundamental logical design was continued to the Nova 3 and Nova 4. (The Nova 2 did not have a MMPU.)
9) The Nova 2 was the first single-board implementation of a fully-parallel CPU by DG, and was also the first DG CPU that employed ROM-driven state logic.
10) Transparent 32-word ROM-stored boot code was available in the Nova 1200 and Nova 800 in addition to the Nova 3, so I don't understand the significance of the ROM boot code reference in the Nova 3 description.
11) The Nova 3 saw the first major introduction of the switching power supply in DG systems, and its noisy, varying high-frequency whine is still as annoying today as it was when first introduced in 1976.
12) Nova 4 also has microcode FPU support for systems without hardware floating point.
13) The Nova 3 and Nova 4 MMPU/MMU could support up to 256KW rather than the marketing-stated 128KW. RDOS would support these larger systems with a one-word patch (that did not please some DG sales and marketing types). This was not a bank-switching design.
14) The microNova (and microEclipse) used a bit-serial bus for data transfer rather than the original parallel data bus/backplane of the 15"x15" card-based systems. This was theoretically much less than half the speed of the "real" backplane'd systems, and anybody who used a microNova or microEclipse computer that was disk-bound could tell you how much they "enjoyed waiting".
15) The MP/200 was not a a single-chip microNova design, but rather based on a bit-slice processor implementation.
--Wild hare 08:38, 23 January 2007 (UTC)
Prose and grammar gripes
Quoted from article --
Led by founder and technical leader Edson deCastro in 1968, the first Nova was delivered in 1969. Mr. deCastro previously worked at DEC (Digital Equipment Corporation) as Product Manager for the PDP-8 series and left DEC, along with a few other DEC people, to form Data General.
-- First sentence would be better with emphasis on "Nova" rather than on Data General.
Second sentence: Grammar quibble: It was not the Nova that was led by deCastro, but rather the Data General company.
Nova ----> Apple I? Hmm
I'm very skeptical of the claim that the Nova influenced the Apple 1. Is there any evidence for this assertion? --Brouhaha 21:12, 6 Feb 2005 (UTC)
- I did a quick Google search, and couldn't find anything concrete about it; the only vaguely relevant stuff I found was this article, where it says that Woz became interested in the 6800, and then the 6502, because their instruction sets resembled that of the Nova, one of his favorite minicomputers; and this story, written by Woz himself, stating that the Nova was his absolute favorite machine. I agree with you that these fuzzy hints don't exactly provide a firm grounding for the Nova ----> Apple I claim. --Wernher 03:12, 7 Feb 2005 (UTC)
Does anyone have more information on this? I'm relying on 20 year old memories of maintaining that when I was in NAS Lemoore as part of the Navy's AN/TPX-42 air traffic control radar.
I'm not ready to insert this into the article, but it was a 16 bit by 16K ferrite bead core memory in a 19 inch rack mount. Some of the components were made of small scale integrated circuits, I believe of TTL in Dual Inline Packages.
I hear reports that this computer is still in service today. --Woolhiser 13:59, 3 May 2006 (UTC)
- Wikipedia can't use original research and needs WP:Verifiability. -- Perspective 21:38, 3 May 2006 (UTC)
"[Nova II] Versions were available with four, seven and ten slots." I'm pretty sure this is incorrect; my recollection is that the Nova II was available in 4-slot and 12-slot versions. I used a Nova II at Mccallie School in Chattanooga, TN in the mid-1970s, and it was the 12-slot version. Will try to find a reference. Dave Cornutt (talk) 15:48, 5 February 2012 (UTC)
Although DG was founded in April 1968, the first Nova was not shipped until 1969. So, I changed the introduction to be more accurate with the dates. JJ 18:33, 17 December 2005 (UTC)
Fair use rationale for Image:Data General Super Nova.jpg
Image:Data General Super Nova.jpg is being used on this article. I notice the image page specifies that the image is being used under fair use but there is no explanation or rationale as to why its use in this Wikipedia article constitutes fair use. In addition to the boilerplate fair use template, you must also write out on the image description page a specific explanation or rationale for why using this image in each article is consistent with fair use.
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Missing info (Performance) in Technical Description
Can anyone fill in some information in the Technical Description? There's a pretty good description of the CPU, memory, I/O etc but no performance data. How fast was it? What was the clock speed? Memory access time? Did it vary for various models? How many clock cycles were required to execute some simple instructions like a load, store, or add? I'm hoping somebody's got this info handy rather than me needing to research it; I'll check back in awhile. (update: I found clock speeds higher up in the article but a new Performance subsection in the Tech Desc section would be good.) Steve Hyland (talk) 19:46, 21 August 2009 (UTC)