|WikiProject Computing||(Rated Start-class, Low-importance)|
This article needs a pin layout / diagram, and pictures of printer ports. Rhobite 01:26, Aug 9, 2004 (UTC)
Added a picture of an IEEE 1284 printer cable. EagleOne 03:35, Nov 27, 2004 (UTC)
Are there any? I may wish to build my own peripherals,but have seen no discussion on timing.
do you know something about "Amphenol"? it is sometimes stated together with "Centronics". you can google for amphenol, and you'll find a lot of different connectors, no one of them looking like a parallel port connector. thanks, --Abdull 19:16, 25 Apr 2005 (UTC)
Technically, there is no CENTRONICS connector. CENTRONICS specified the Amphenol 57 series connector in it's interface. Gadget850 13:08, 19 July 2005 (UTC) See my major update of Centronics and addition or micro ribbon. Gadget850 17:10, 10 August 2005 (UTC)
Shouldn't LPT be merged into this article, or vice-versa?
They are not quite the same, since one is buffered, one is not, one is a char device on linux, the other not, one can be used for cnc and each bit is driven and the other does not....
The german wikipedia page seems to have more info, unfortunately I dont know german.... I arrived here trying to find out which is whitch, and how to find out if my pc (that being modern enough does not ) — Preceding unsigned comment added by 184.108.40.206 (talk) 14:38, 22 June 2012 (UTC)
Data throughput rate
There seems to be a little confusion as to whether the throughput is BITS or BYTES per second. Any chance someone in the know could correct whichever one is wrong please?
I agree there is confusion. What I noticed is a contradiction between the table's listed speeds for ECP and EPP, vs. the speeds for same listed in the text above the table. I do not *know* what's what, but I *think* ECP is faster/more recent. HTH.
A guy sitting in the next cube was at ZDS when ECP was created by them and some other heavyweights at that time...it is the faster one and uses DMA. EPP is slower. John O220.127.116.11 20:33, 22 May 2007 (UTC)
- The table is obviously wrong, at least. The reference states that "output pulse is specified to 2 MHz", and the port is 8 bits, one byte, wide, which would give 2 megabytes per second. And Nibble Mode, which I assume is only a minor tweak, is supposedly faster than ECP, the DMA-driven standard specifically designed for high speed data transfer. Furthermore, I'm not sure that a bandwidth figure is even meaningful for the "lower" modes given that they are not standardized in the same way. I'll cut it from the article for now (and paste it below). magetoo 05:20, 14 June 2009 (UTC)
|Transfer mode||Distance (meter)
|Speed (bits per second) |
Anyone clear this up?
Under List of device bandwidths, parallel port is mentioned as having a max speed of 16Mbits/s, and that is described as EPP. That doesn't seem to tally with this article which mentions a max speed of 2.5 Mbits/s (and that being for the faster ECP). 18.104.22.168 (talk) 12:16, 18 April 2008 (UTC)
- The parallel port sends 8 bits at a time. 2 M writes/sec (EPP) multiplied by 8 data lines gives 16 Mbit/sec. The article really should say 2 Mbyte/sec (or 16 Mbit). magetoo 05:31, 14 June 2009 (UTC)
picture male or female?
The caption says that's a male 36-pin connector. It looks to me like those are holes in the central block of plastic, not pins. I'll admit it looks like there's a row of pins above that block. Hermaphroditic connector?
- It is male. The ribbon contacts are formed above and below the central block. Individual contacts do not insert into the female connector like a DB. Look at the female connector- the male contacts slide across the female contacts. See micro ribbon for a better photo. -- Gadget850 talk 11:30, 28 February 2014 (UTC)
IEEE 1284 connectors and cables
This entire section needs redrafting. I am not an expert on 1284 but it is clear that is conflating a number of different areas. 1284-I/1284-II are not purely cables but specify a complete implementation - cables wiring, connectors and signalling - in particular 1284-II is not TTL although it is designed to be interoperable in the simple case, i.e. short cable and low to moderate speed. I may return to this if I have a slack couple of hours at some point but that entire section is suspect at this time. ﬥ (talk) 19:12, 11 June 2015 (UTC)
- IEEE-1284 Specification itself does not specify minimum guaranteed length for level 2 device, only amount of current, voltage, and pull-up resistant for the lines. In early PC interface, control signals is limited to sinking only 7 mA at 0.8 V, which practically limits cable length to 2 metres.
- Specification itself only claims transfer rate depends on the speed of the host computer, the driver implementation, and the peripheral being used. However, output pulse is specified to 2 MHz, signals take 5 nanoseconds to rise or fall. Listed speeds are confirmed maximum (without compression), calculated based on minimum time needed to completely transfer 1 byte of data and to perform any handshake necessary to start transferring the next byte of data. Ideal line condition is assumed. Timing excludes handshakes for negotiating a transfer mode or busy signal.