|WikiProject Computing / Hardware||(Rated Start-class, Mid-importance)|
What about the instruction pointer register aka program counter register?
Surely there must be an instruction pointer in the guise of a 33rd hidden, special register. Don Knuth's original documentation doesn't mention this register, but his software makes use of the at-sign (@). Maybe it's unnecessary to mention the @-register. Any opinions? -- Ximalas (talk) 16:09, 17 October 2010 (UTC)
- I agree that this article should a few words about the program counter (instruction pointer) of the MMIX.
- There is also surely an instruction register and likely several other internal microarchitectural registers.
- Some style guides seem to recommend discussing only the instruction set and programmer-visible registers when describing a CPU to programmers, leaving out implementation details such as microarchitectural registers.
- Apparently someone feels that the instruction pointer is not one of the "programmer-visible" registers in the MMIX.
- Is there some reason Ximalas suspects the PC is a 33rd special register, rather than a 37th special register, or some other category of register entirely?
- --DavidCary (talk) 06:40, 30 November 2013 (UTC)
- I originally thought it would be appropriate to mention such a register. In hindsight, after reading the remarks on this page and knowing that every MMIX program operates on virtual addresses, that's your address, be it your code or your data. Apparently there is no way of determining the physical addresses for each invocation other than through the services of the hypothetical operating system NNIX. Ximalas (talk) 19:35, 3 January 2014 (UTC)
The article states briefly that there is no hardware implementation, but why isn't there? Wouldn't it be a great teaching tool? It wouldn't have to be anything special in terms of speed or complexity or physical compactness - the point after all would be to illustrate very close-to-the-metal concepts to people wishing to understand them, rather than create a commercially viable new computing architecture. Second question: when Knuth says "I was careful to include all of the complexities needed to achieve high performance in practice, so that MMIX could in principle be built and even perhaps be competitive with some of the fastest general-purpose computers in the marketplace" did he really think it could become a popular new architecture? If so, and given that Knuth is a pretty intelligent guy, why did it not come to be regarded as a viable option for widespread use? Beorhtwulf (talk) 22:32, 28 February 2011 (UTC)
We all expect to see the MMIX description published in the 4th edition of The Art of Computer Programming, Volume 1.
But since that hasn't been published yet, don't you think it's a little premature to be asking why it failed?
There is a popular misconception that "competitive with some of the fastest general-purpose computers in the marketplace" has something to do with "widespread use".
AMD and Intel make some of the fastest CPUs available in the marketplace -- "competitive with some of the fastest general-purpose computers in the marketplace". You might think that would lead to them being the most widely used CPUs -- "widespread use".
But they aren't. A certain alternative 32-bit architecture sells more chips per year than the per-year sales of all of AMD's and Intel's 32-bit (x86 architecture) and 64-bit (x86-64 architecture) CPUs combined.
Pretty much all of those 32-bit and 64-bit CPUs are faster than any 8-bit CPU, and yet the last time I checked, 8-bit CPUs sold per year still far outnumbered all 32-bit and 64-bit processors sold per year combined (microprocessor#Market statistics).
Therefore, just because something is "competitive with some of the fastest general-purpose computers in the marketplace" has little to do with "widespread use".