Talk:SPARC

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Chronological ordering of SPARC microprocessor specifications[edit]

Is there any reason why it isn't ordered chronologically? I would like to order it chronologically if there is no reason why it shouldn't be. Rilak (talk) 09:13, 4 May 2009 (UTC)

It's vaguely chronological, but with some clustering of related series of processors. If we go for strict chronology, perhaps we should consider breaking it up into sub tables to illustrate the broad families? (eg. something like V7, SuperSPARC, hyperSPARC, MicroSPARC, TurboSPARC, UltraSPARC, SPARC64, UltraSPARC T?). Letdorf (talk) 11:08, 4 May 2009 (UTC).
Yeah, breaking it up by ISA version is better idea as its a confusing at the moment. We don't have anything on V7 SPARCs though, which needs to be fixed. Perhaps this would be a good opportunity? Rilak (talk) 11:37, 4 May 2009 (UTC)
Yes, I thought about listing the various V7 implementations, but there were a number of them, most were very similar, the IUs and FPUs were discrete chips and details like die size and transistor count are hard to come by. Two interesting implementations worth noting though were the Panasonic MN10501 KAP used by Solbourne and the Bipolar Integrated Technology B5000. I believe these were both V7-compliant. Letdorf (talk) 12:40, 4 May 2009 (UTC).
My understanding is that the B5000 and MN10501 were not very popular. While information about the B5000 is easy to get (from the Hot Chips archive), the MN10501 doesn't seem to have been mentioned at all. The SPARC chip sets made by Cypress Semiconductor and LSI Logic were the most commonly used, so perhaps they should have higher priority. Fujitsu, Texas Instruments and Weitek also made SPARC V7 parts. I think it is possible to obtain information about most of them from archived news articles, for example, this [http://www.cbronline.com/news/sun_unveils_sun_4200_aims_to_make_sparc_risc_a_standard article] has a bit about the first SPARC. Rilak (talk) 06:16, 5 May 2009 (UTC)
Another good reference is the Sun Hardware Reference which lists the CPUs used in older Sun systems. The B5000 and the KAP aren't notable for their popularity, but they were interesting for being an ECL implementation, and an early example of a SPARC-compatible chip developed without the participation of (indeed, in competition with) Sun, respectively. There's some mention of the KAP here and here, and I think this paper is about the KAP too. Letdorf (talk) 10:01, 5 May 2009 (UTC).
Interesting links. I looked for the KAP a while ago and didn't think anything. In regards to the links, I don't think there is anything that isn't in the list of SPARC V7s from SPARC International. I haven't looked into them yet, except for the CY7C601 chip set. We need a draft page somewhere to work on this. Rilak (talk) 12:24, 5 May 2009 (UTC)

"SPARC"[edit]

FYI, the usage of the title "SPARC" is under discussion at Talk:SPARC (disambiguation) -- 70.24.247.127 (talk) 22:28, 18 December 2012 (UTC)

Number of Register windows[edit]

The article says that the number of register windows is in the range from 3 to 32 (including). This is wrong for SPARC V8 (and V7) as it is clearly allowed to have an implementation with only two register windows ( http://www.sparc.com/standards/V8.pdf ,section 2.1). As this is a article about the SPARC ISA in general und not one that is specific to V9, it is wrong and must be corrected. Or it must be noted that for V9 the specs says 3 to 32. — Preceding unsigned comment added by 109.192.59.21 (talk) 19:04, 4 May 2013 (UTC)