The article at the page http://en.wikipedia.org/wiki/Logic_family says that F and AS came out in 1979 and 1980, not in 1985 like in this article. Something needs to be changed and corrected. The G family from 2004 is not mentioned in this article.
I fixed the "Sub-types" section by moving out of the dotted list the last three sentences since they really weren't in the right place.
Why is not in fig "Two-input TTL NAND gate" a bias resistor for the base of output transistor? — Preceding unsigned comment added by Oabernhardt (talk • contribs) 14:49, 11 June 2012 (UTC)
For one thing, it's a simplified diagram. For another, current will flow from Vcc through the resistor to the base of the input transistor, then through the base-collector junction to the base of the output transistor. Jc3s5h (talk) 16:08, 11 June 2012 (UTC)
Yes, it is an oversimplified diagram. The output transistor will either get is base drive from the resistor through the multiple emitter transistor's B-C junction, or the collector of the of ME transistor will suck out the base charge. If you consider the threshold voltage in the simple diagram, it is around 0.7V -- not the 1.4V of a typical TTL gate. The totem pole circuit lower down is better for details. Glrx (talk) 17:13, 11 June 2012 (UTC)