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Wear leveling (also written as wear levelling) is a technique for prolonging the service life of some kinds of erasable computer storage media, such as flash memory used in solid-state drives (SSDs) and USB flash drives. There are a few different wear leveling mechanisms used in flash memory systems, each with varying levels of flash memory longevity enhancement.
The term preemptive wear leveling (PWL) has been used by Western Digital to describe their preservation technique used on hard disk drives (HDDs) designed for storing audio and video data. However, HDDs generally are not wear-leveled devices in the context of this article.
EEPROM and flash memory media have individually erasable segments, each of which can be put through a limited number of erase cycles before becoming unreliable. This is usually around 3,000/5,000 cycles but many flash devices have one block with a specially extended life of 100,000+ cycles that can be used by the Flash memory controller to track wear and movement of data across segments. Erasable optical media such as CD-RW and DVD-RW are rated at up to 1,000 cycles (100,000 cycles for DVD-RAM media).
Wear leveling attempts to work around these limitations by arranging data so that erasures and re-writes are distributed evenly across the medium. In this way, no single erase block prematurely fails due to a high concentration of write cycles. In flash memory, a single block on the chip is designed for longer life than the others so that the memory controller can store operational data with less chance of its corruption.
Conventional file systems such as FAT, UFS, HFS, ext2, and NTFS were originally designed for magnetic disks and as such rewrite many of their data structures (such as their directories) repeatedly to the same area. When these systems are used on flash memory media, this becomes a problem. The problem is aggravated by the fact that some file systems track last-access times, which can lead to file metadata being constantly rewritten in-place.
There are three basic types of wear leveling mechanisms used in flash memory storage devices:
No wear leveling
A flash memory storage system with no wear leveling will not last very long if data is written to the flash. Without wear leveling, the underlying flash controller must permanently assign the logical addresses from the operating system (OS) to the physical addresses of the flash memory. This means that every write to a previously written block must first be read, erased, modified, and re-written to the same location. This approach is very time-consuming and highly written locations will wear out quickly, while other locations will not be used at all. Once a few blocks reach their end of life, such a device becomes no longer operable.
Dynamic wear leveling
The first type of wear leveling is called dynamic wear leveling and it uses a map to link logical block addresses (LBAs) from the OS to the physical flash memory. Each time the OS writes replacement data, the map is updated so the original physical block is marked as invalid data, and a new block is linked to that map entry. Each time a block of data is re-written to the flash memory, it is written to a new location. However, flash memory blocks that never get replacement data would sustain no additional wear, thus the name comes from only the dynamic data being recycled. Such a device may last longer than one with no wear leveling, but there are blocks still remaining as active that will go unused when a device is no longer operable.
Static wear leveling
The other type of wear leveling is called static wear leveling which also uses a map to link the LBA to physical memory addresses. Static wear leveling works the same as dynamic wear leveling except the static blocks that do not change are periodically moved so that these low usage cells are able to be used by other data. This rotational effect enables an SSD to continue to operate until most of the blocks are near their end of life. This is also sometimes referred to as global wear leveling, as the entire image is leveled.
The following table compares static and dynamic wear leveling:
|Endurance||Longer life expectancy||Shorter life expectancy|
|Design Complexity||More complex||Less complex|
|Typical Use||SSDs||USB Flash Drives|
There are several techniques for extending the media life:
- A checksum or error-correcting code can be kept for each block or sector in order to detect errors or correct errors.
- A pool of reserve space can also be kept. When a block or sector does fail, future reads and writes to it can be redirected to a replacement in that pool.
- Blocks or sectors on the media can be tracked in a least frequently used (LFU) queue of some sort. The data structures for the queue itself must either be stored off-device or in such a way that the space it uses is itself wear-leveled or, in the case of flash memory, in a block with a specially extended life. However, usual cache algorithms are designed to manage the data flow into and out of RAM-based caches, making them not directly suitable for flash-based storage devices as they have an asymmetrical nature – reads are usually much faster than writes, and erase operations can be performed only one "block" at a time.
M-Systems' product DiskOnChip used a software driver named TrueFFS which performed wear-leveling of NAND flash chips and made them appear to the OS like a conventional disk drive. On most contemporary flash memory devices, such as CompactFlash and Secure Digital cards, these techniques are implemented in hardware by a built-in microcontroller. On such devices, wear leveling is transparent and most conventional file systems can be used on them as-is.
Wear leveling can also be implemented in software by special-purpose file systems such as JFFS2 and YAFFS on flash media or UDF on optical media. All three are log-structured file systems in that they treat their media as circular logs and write to them in sequential passes. File systems which implement Copy-on-write strategies, such as ZFS, also implement a form of wear leveling.
- U.S. Patent 6,850,443 Wear leveling techniques for flash EEPROM systems.
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