Whirlwind computer elements: core memory (left) and operator console
|Part of||"Whirlwind Program"/"Whirlwind Project"|
|Location||MIT's Barta Building (now building N42)
211 Massachusetts Ave, Cambridge MA
1948-April 20, 1951
|Wikimedia Commons: Project Whirlwind|
Whirlwind I was a Cold War vacuum tube computer developed by the MIT Servomechanisms Laboratory for the U.S. Navy. It was amongst the first digital electronic computers that operated in real-time for output, and the first that was not simply an electronic replacement of older mechanical systems. Its development led directly to the Whirlwind II design used as the basis for the United States Air Force SAGE air defense system, and indirectly to almost all business computers and minicomputers in the 1960s.
During World War II, the U.S. Navy approached MIT about the possibility of creating a computer to drive a flight simulator for training bomber crews. They envisioned a fairly simple system in which the computer would continually update a simulated instrument panel based on control inputs from the pilots. Unlike older systems like the Link Trainer, the system they envisioned would have a considerably more realistic aerodynamics model that could be adapted to any type of plane. This was an important consideration at the time, when many new designs were being introduced into service.
The Servomechanisms Lab in MIT building 32 conducted a short survey that concluded such a system was possible. The Navy decided to fund development under Project Whirlwind, and the lab placed Jay Forrester in charge of the project. They soon built a large analog computer for the task, but found that it was inaccurate and inflexible. Solving these problems in a general way would require a much larger system, perhaps one so large as to be impossible to construct.
In 1945, Perry Crawford, another member of the MIT team, saw a demonstration of ENIAC and suggested that a digital computer was the solution. Such a machine would allow the accuracy of the simulation to be improved with the addition of more code in the computer program, as opposed to adding parts to the machine. As long as the machine was fast enough, there was no theoretical limit to the complexity of the simulation.
Until this point, all computers constructed were dedicated to single tasks, run in batch mode. A series of inputs were set up in advance and fed into the computer, which would work out the answers and print them. This was not appropriate for the Whirlwind system, which needed to operate continually on an ever-changing series of inputs. Speed became a major issue, whereas with other systems it simply meant waiting longer for the printout, with Whirlwind it meant seriously limiting the amount of complexity the simulation could include.
Design and construction
By 1947, Forrester and collaborator Robert Everett completed the design of a high-speed stored-program computer for this task. Most computers of the era operated in bit-serial mode, using single-bit arithmetic and feeding in large words, often 48 or 60 bits in size, one bit at a time. This was simply not fast enough for their purposes, so Whirlwind included sixteen such math units, operating on a complete 16-bit word every cycle in bit-parallel mode. Ignoring memory speed, Whirlwind ("20,000 single-address operations per second" in 1951) was essentially sixteen times as fast as other machines. Today almost all CPUs do arithmetic in "bit-parallel" mode.
The word size was selected after some deliberation. The machine worked by passing in a single address with almost every instruction, thereby reducing the number of memory accesses. For operations with two operands, adding for instance, the "other" operand was assumed to be the last one loaded. Whirlwind operated much like a reverse Polish notation calculator in this respect; except there was no operand stack, only an accumulator. The designers felt that 2048 words of memory would be the minimum usable amount, requiring 11 bits to represent an address, and that 16 to 32 instructions would be the minimum for another 5 bits — and so it was 16-bits.
The Whirlwind design incorporated a control store driven by a master clock. Each step of the clock selected one or more signal lines in a diode matrix that enabled gates and other circuits on the machine. A special switch directed signals to different parts of the matrix to implement different instructions. In the early 1950s, Whirlwind I "would crash every 20 minutes on average."
Whirlwind construction started in 1948, an effort that employed 175 people including 70 engineers and technicians. Whirlwind took three years to build and first went online on April 20, 1951. The project's budget was approximately $1 million a year, which was vastly higher than the development costs of most other computers of the era. After three years the Navy had lost interest. However, during this time the Air Force had become interested in using computers to help the task of ground controlled interception, and the Whirlwind was the only machine suitable to the task. They took up development under Project Claude.
The memory subsystem
The original machine design called for 2048 (2K) words of 16 bits each of random-access storage. The only two available memory technologies in 1949 that could hold this much data were mercury delay lines and electrostatic storage.
A mercury delay line consisted of a long tube filled with mercury, a mechanical transducer on one end, and a microphone on the other end, much like a spring reverb unit later used in audio processing. Pulses were sent into the mercury delay line at one end, and took a certain amount of time to reach the other end. They were detected by the microphone, amplified, reshaped into the correct pulse shape, and sent back into the delay line. Thus, the memory was said to recirculate.
Mercury delay lines operated at about the speed of sound, so were very slow in computer terms, even by the standards of the computers of the late 1940s and 1950s. The speed of sound in mercury was also very dependent on temperature. Since a delay line held a defined number of bits, the frequency of the clock had to change with the temperature of the mercury. If there were many delay lines and they did not all have the same temperature at all times, the memory data could easily become corrupted.
The Whirlwind designers quickly discarded the delay line as a possible memory—it was both too slow for the envisioned flight simulator, and too unreliable for a reproducible production system, of which Whirlwind was intended to be a functional prototype.
The alternative form of memory was known as "Electrostatic". This was a cathode ray tube memory, similar in many aspects to an early TV picture tube or oscilloscope tube. An electron gun sent a beam of electrons to the far end of the tube, where they impacted a screen. The beam would be deflected to land at a particular spot on the screen. The beam could then build up a negative charge at that point, or change a charge that was already there. By measuring the beam current it could be determined whether the spot was originally a zero or a one, and a new value could be stored by the beam.
There were several forms of Electrostatic memory tubes in existence in 1949. The best known today is the Williams tube developed in England, but there were a number of others that had been developed independently by various research labs. The Whirlwind engineers considered the Williams tube, but determined that the dynamic nature of the storage and the need for frequent refresh cycles was incompatible with the design goals for Whirlwind I. Instead, they settled on a design that was being developed at the MIT Radiation Laboratory. This was a dual-gun electron tube. One gun produced a sharply focused beam to read or write individual bits. The other gun was a "flood gun" that sprayed the entire screen with low-energy electrons. As a result of the design, this tube was more of a Static RAM that did not require refresh cycles, unlike the Dynamic RAM Williams tube.
In the end the choice of this tube was unfortunate. The Williams tube was considerably better developed, and despite the need for refresh, could easily hold 1024 bits per tube, and was quite reliable when operated correctly. The MIT tube was still in development, and while the goal was to hold 1024 bits per tube, this goal was never reached, even several years after the plan had called for full-size functional tubes. Also, the specifications had called for an access time of 6 microseconds, but the actual access time was around 30 microseconds. Since the basic cycle time of the Whirlwind I processor was determined by the memory access time, the entire processor was slower than designed.
Jay Forrester was desperate to find a suitable memory replacement for his computer. Initially the computer only had 32 words of storage, and 27 of these words were read-only registers made of toggle switches. The remaining 5 registers were flip-flop storage, with each of the five registers being made from more than 30 vacuum tubes. This "test storage" as it was known, was intended to allow checkout of the processing elements while the main memory was not ready. Main memory was so late that the first experiments of tracking airplanes with live radar data were done using a program manually set into test storage.
Jay came across an advertisement for a new magnetic material being produced by a company. Recognizing that this had the potential to be a data storage medium, Jay obtained a workbench in the corner of the lab, and got several examples of the material to experiment with. Then for several months he spent as much time in the lab as he did in the office managing the entire project. At the end of those months he had invented the basics of magnetic core memory and demonstrated that it was likely to be feasible. His demonstration consisted of a small core plane of 32 cores, each 3/8 of an inch in diameter. Having demonstrated that the concept was practical, it needed only to be reduced to a workable design. Jay asked Dudley Allen Buck (who would go on to invent the cryotron and content-addressable memory at the lab) who was then student in search of a Master's Thesis project to work on the material and assigned him to the workbench, while Jay went back to full-time project management.
After approximately two years of further research and development, they were able to demonstrate a core plane that was made of 32 by 32, or 1024 cores, holding 1024 bits of data. Thus, they had reached the originally intended storage size of an Electrostatic tube, a goal that had not yet been reached by the tubes themselves, only holding 512 bits per tube in the latest design generation. Very quickly a 1024 word core memory was fabricated, replacing the electrostatic memory. The electrostatic memory design and production was summarily canceled, saving a good deal of money to be reallocated to other research areas. Two additional core memory units were later fabricated, increasing the total memory size available.
Air defense networks
After connection to the experimental Microwave Early Warning (MEW) radar at Hanscom Field "using Jack Harrington's equipment and commercial phone lines", aircraft were tracked by Whirlwind I. The Cape Cod System subsequently demonstrated computerized air defence covering southern New England.[specify] Signals from three long range (AN/FPS-3) radars, eleven gap-filler radars, and three height-finding radars were transmitted over telephone lines to the Whirlwind I computer in Cambridge, Massachusetts. The Whirlwind II design[who?] for a larger and faster machine (never completed) was the basis for the SAGE IBM AN/FSQ-7 Combat Direction Central.
After supporting SAGE, Whirlwind I was rented ($1/yr) from June 30, 1959, until 1974 by project member, Bill Wolf. Ken Olsen and Robert Everett saved the machine which became the basis for the 1979 Digital Computer Museum. Whirlwind I is in the collection of the Computer History Museum (Mountain View CA) and as of February 2009, a core memory unit is displayed at the Charles River Museum of Industry (Waltham MA).
The Whirlwind used approximately 5,000 vacuum tubes. An effort was also started to convert the Whirlwind design to a transistorized form, led by Ken Olsen and known as the TX-0. TX-0 was very successful and plans were made to make an even larger version known as TX-1. However this project was far too ambitious and had to be scaled back to a smaller version known as TX-2. Even this version proved troublesome, and Olsen left in mid-project to start Digital Equipment Corporation (DEC). DEC's PDP-1 was essentially a collection of TX-0 and TX-2 concepts in a smaller package.
The building which housed Whirlwind was until recently home to MIT's campus-wide IT department, Information Services & Technology and in 1997–8, it was restored to its original exterior design.
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- Everett, R.R; Swain, F.E (September 4, 1947). Report R-127 Whirlwind I Computer Block Diagrams (Report). Servomechanisms Laboratory, MIT. p. 2. Archived from the original on 2006-09-08. http://web.archive.org/web/20060908172605/http://www.cs.stthomas.edu/faculty/resmith/papers/WhirlwindR-127.pdf. Retrieved 2012-12-31. "The basic impulse rate for operation of the computer will be one megacycle. ... The Whirlwind I Computer is being planned for a storage capacity of 2,048 numbers of 16 binary digits each."
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