Package on a package: Difference between revisions
Helvetica13 (talk | contribs) →Benefits: added a citation for some of the benefits of package on package assembly |
|||
Line 16: | Line 16: | ||
* Only "known good" packages are used in final assembly (if the memory is bad only the memory is thrown away and so on). Compare this to stacked-die packages where the entire set is thrown away if either the memory or logic is bad. |
* Only "known good" packages are used in final assembly (if the memory is bad only the memory is thrown away and so on). Compare this to stacked-die packages where the entire set is thrown away if either the memory or logic is bad. |
||
* The end user (for example [[cell phone]] maker or [[digital camera]] maker) controls the logistics. This means memory from different suppliers can be used at different times without changing the logic. The memory becomes a commodity to be sourced from the lowest priced supplier. This particular point is also a benefit compared to PiP (package in package) which requires a specific memory device to be designed in and sourced upstream of the end user. |
* The end user (for example [[cell phone]] maker or [[digital camera]] maker) controls the logistics. This means memory from different suppliers can be used at different times without changing the logic. The memory becomes a commodity to be sourced from the lowest priced supplier. This particular point is also a benefit compared to PiP (package in package) which requires a specific memory device to be designed in and sourced upstream of the end user. |
||
* Because the construction is like [[Lego]], any mechanically mating top package can be used. For a low-end phone, a smaller memory configuration may be used on the top package. For a high-end phone, more memory could be used with the same bottom package. This simplifies inventory control by the OEM. For a stacked-die package or even PiP ([[package in package]]), the exact memory configuration needs to be known weeks (or months) in advance. |
* Because the construction is like [[Lego]], any mechanically mating top package can be used. For a low-end phone, a smaller memory configuration may be used on the top package. For a high-end phone, more memory could be used with the same bottom package.<ref>[http://www.indium.com/products/semiconductorpackagingassembly/packageonpackage.php Package-on-Package (POP]</ref> This simplifies inventory control by the OEM. For a stacked-die package or even PiP ([[package in package]]), the exact memory configuration needs to be known weeks (or months) in advance. |
||
* Because the memory only comes into the mix at final assembly, there is no reason for logic suppliers to source any memory. With a stacked-die device, the logic provider would need to buy wafers of memory from a memory supplier. |
* Because the memory only comes into the mix at final assembly, there is no reason for logic suppliers to source any memory. With a stacked-die device, the logic provider would need to buy wafers of memory from a memory supplier. |
||
Revision as of 20:25, 23 March 2011
It has been suggested that this article be merged with System in package. (Discuss) Proposed since March 2010. |
Package on Package (PoP) is an integrated circuit packaging technique to allow vertically combining discrete logic and memory ball grid array (BGA) packages. Two or more packages are installed on top of one another, i.e. stacked, with a standard interface to route signals between them. This allows higher density, for example in the mobile telephone / PDA market.
Typical configurations
There are two widely used configurations for PoP:
- Pure memory stacking (two or more memory only packages are stacked on top of each other)
- Logic (CPU) package in the bottom, memory package on top. For example, the bottom could be an application processor for a cell phone. The logic package goes on the bottom because it requires many more BGA connections to the motherboard.
Benefits
The most obvious benefit is motherboard space savings. PoP shares this trait with stacked-die packages. However there are several key differences between stacked-die and stacked-package products.
The main financial benefit of package on package is that the memory device is decoupled from the logic device. Thus:
- The memory package can be tested separately from the logic package
- Only "known good" packages are used in final assembly (if the memory is bad only the memory is thrown away and so on). Compare this to stacked-die packages where the entire set is thrown away if either the memory or logic is bad.
- The end user (for example cell phone maker or digital camera maker) controls the logistics. This means memory from different suppliers can be used at different times without changing the logic. The memory becomes a commodity to be sourced from the lowest priced supplier. This particular point is also a benefit compared to PiP (package in package) which requires a specific memory device to be designed in and sourced upstream of the end user.
- Because the construction is like Lego, any mechanically mating top package can be used. For a low-end phone, a smaller memory configuration may be used on the top package. For a high-end phone, more memory could be used with the same bottom package.[1] This simplifies inventory control by the OEM. For a stacked-die package or even PiP (package in package), the exact memory configuration needs to be known weeks (or months) in advance.
- Because the memory only comes into the mix at final assembly, there is no reason for logic suppliers to source any memory. With a stacked-die device, the logic provider would need to buy wafers of memory from a memory supplier.
Electrically, PoP offers benefits by minimizing track length between, for example, a controller and a memory. This results in better electrical performance of the devices, since the shorter routing of interconnections between circuits results in faster signal propagation and reduction in noise and cross-talk.
JEDEC standardization
- JEDEC JC-11 committee deals with package outline drawing standards related to the bottom PoP package. See documents MO-266A and JEDEC publication 95, Design Guide 4.22.
- JEDEC JC-63 committee deals with top (memory) PoP package pinout standardization. See JEDEC Standard No. 21-C, Page 3.12.2 – 1
Other names
Package on package is also known by other names:
- PoP (which refers to the combined top and bottom packages)
- PoPt (which refers to the top package)
- PoPb (which refers to the bottom package)
- PSvfBGA refers to the bottom package (Stands for Package Stackable Very thin Fine pitch BGA)
- PSfcCSP refers to the bottom package (Stands for Package Stackable Flip Chip Chip Scale Package)
External links
- 3D & Stacked-Die Packaging Technology Solutions
- Innovations push Package on Package into new markets, Flynn Carson, Semiconductor International, April 2010
- Practical Components PoP Samples and Test Boards (daisy chains)
- Package-on-Package: The Story Behind This Industry Hit (Semiconductor International, 6/1/2007)
- Package-on-package is killer app for handsets (EETimes Article July 2008)
- "POP" Goes the Future (Assembly Magazine, 9/30/2008)
- [Package on Package: http://www.statschippac.com/services/packagingservices/3dsdsp/~/media/Files/Package%20Datasheets/POP.ashx Top and Bottom PoP Technologies]
- PoP Solder Balling (Circuits Assembly Magazine, December 2010)
- The BeagleBoard uses a PoP processor
- Killer app for cell handsets EETimes 10/20/2008
- TMV: An ‘Enabling’ Technology for Next-Gen PoP Requirements Semicon International 11/04/2008
- Rolling with Solder Balls (Circuits Assembly Magazine, October 2010)
- Don't Drown the Part! (Circuits Assembly Magazine, August 2010)
- Package on Package Layout 9/03/2009
- Paste Dipping Isn't So Bad After All 2/5/2009
- POP (Package On Package): An Ems Perspective On Assembly, Rework And Reliability 02/12/2009
- Hamid Eslampour et al.Comparison of Advanced PoP Package Configurations, 2010 Electronic Components and Technology Conference (ECTC) Proceedings
- KOSES - POP Laser Drilling Machine