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I486

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Intel 486
The exposed die of an Intel 80486DX2 microprocessor.
General information
Launched1989
Discontinued2007
Common manufacturer
Performance
Max. CPU clock rate16  MHz to 100 MHz
FSB speeds16 MHz to 50 MHz
Architecture and classification
Technology node1µm to 0.6µm
Instruction setx86 (including x87 floating point)
Physical specifications
Package

The Intel i486 (or 80486) was announced at Spring Comdex in April 1989. At the announcement, Intel stated that samples would be available in the third quarter of 1989 and production quantities would ship in the fourth quarter of 1989. [1] The first 80486-based PCs were announced in late 1989, but some advised that people wait until 1990 to purchase an 80486 PC because there were early reports of bugs and software incompatibilities. [2] The 80486 was the first tightly[3] pipelined x86 design. It was also the first x86 chip to use more than a million transistors, due to a large on-chip cache and an integrated floating point unit. It represents a fourth generation of binary compatible CPUs since the original 8086 of 1978, and it was the second 32-bit x86 design after the 80386.

A 50 MHz 80486 executed around 40 million instructions per second on average and was able to reach 50 MIPS peak.

The i486 was without the usual 80-prefix because of a court ruling that prohibited trademarking numbers (such as 80486). Later, with the Pentium, Intel began branding its chips with words rather than numbers.

Improvements

The instruction set of the i486 is very similar to its predecessor, the Intel 80386, with the addition of only a few extra instructions, such as CMPXCHG which executes the Compare-and-swap atomic operation and the XADD which executes the Fetch-and-add atomic operation. Though many atomic test-and-set instructions have existed since the 8086/8088, they did not correspond to the atomic instructions implemented in certain RISC processors, which made it harder to port some applications from these processors.

From a performance point of view, the architecture of the i486 is a vast improvement over the 80386. It has an on-chip unified instruction and data cache, an on-chip floating-point unit (FPU), except in the SX and SL models, and an enhanced bus interface unit. Simple instructions (such as ALU reg,reg) execute in one clock cycle. These improvements yield a rough doubling in ALU performance over the 386 at the same clock rate. A 16-MHz 486 therefore has a performance similar to a 33-MHz 386 (or 286), and the older design has to reach 50 MHz to be comparable with a 25-MHz 486 part.[4]

The 486DX2 architecture.

Differences between the 386 and 486

  • An 8 KB on-chip SRAM cache stores the most recently used instructions and data (16 KB and/or write-back on some later models). The 386 had no such internal cache but supported a slower off-chip cache.
  • Tightly coupled pipelining allows the 486 to complete a simple instruction like ALU reg,reg or ALU reg,im every clock cycle. The 386 needed two clock cycles for this.
  • Integrated FPU (disabled or absent in SX models) with a dedicated local bus gives faster floating point calculations compared to the i386+i387 combination.
  • Improved MMU performance.

The 486 has a 32-bit data bus and a 32-bit address bus. This required either four matched 30-pin (8-bit) SIMMs or one 72-pin (32-bit) SIMM on a typical PC motherboard. The 32-bit address bus means that 4 GB of memory can be directly addressed.

Models

There are several suffixes and variants including:

  • i486DX: The original chip (without any clock doubling).
  • i486DX-S: SL Enhanced 486DX
  • i486SX: an i486DX with the FPU part disabled or missing. Early variants were parts with disabled (defective[citation needed]) FPUs, later versions had the FPU removed from the die to reduce area and hence cost.[citation needed]
  • i486SX-S: SL Enhanced 486SX
  • i486DX2: the internal processor clock runs at twice the clock rate of the external bus clock.
  • i486SX2: i486DX2 with the FPU disabled.
  • i486SL: low power version of the i486DX, reduced VCore, SMM (System Management Mode), stop clock, and power saving features - mainly for use in portable computers.
  • i486SL-NM: i486SL based on i486SX
  • i487SX: i486DX with a slightly different pinout sold as an FPU upgrade to i486SX systems; it was widely documented that an i487SX when installed completely disabled the existing i486SX on the motherboard, replacing it.
  • i486 OverDrive: i486SX, i486SX2, i486DX2 or i486DX4. Marked as upgrade processors, some models had different pinouts or voltage handling abilities from 'standard' chips of the same speed stepping. Fitted to a coprocessor or "OverDrive" socket on the motherboard, worked the same as the i487SX.
  • i486DX4: designed to run at triple clock rate (not quadruple as often believed; the DX3, which was meant to run at 2.5x the clock speed, was never released). DX4 models that featured write-back cache were identified by an "&EW" laser etched into their top surface, while the write-through models were identified by "&E".

The specified maximum internal clock frequency (on Intels versions) ranged from 16 to 100 MHz. The 16 MHz i486SX model was used by Dell Computers.

One of the few 486 models specified for a 50 MHz bus (486DX-50) initially had overheating problems and was moved to the 0.8 micrometre fabrication process. However, problems continued when the 486DX-50 was installed in local bus systems due to the high bus speed, making it rather unpopular with mainstream consumers as local bus video was considered a requirement at the time, though it remained popular with users of EISA systems. The 486DX-50 was soon eclipsed by the clock-doubled i486DX2 which instead ran the CPU logic at twice the external bus speed.

More powerful 486 iterations such as the OverDrive and DX4 were less popular (the latter available as an OEM part only), as they came out after Intel had released the next generation Pentium. Certain steppings of the DX4 also officially supported 50 MHz bus operation but was a seldom used feature.

Model Specified max clock Voltage L1-Cache Introduced
i486DX (P4) 20,25,33 MHz; 50 MHz 5V 8 KB WT April 1989; April 1989; May 1990; June 1991
i486SL 20,25,33 MHz 5V or 3.3V 8 KB WT Nov 1992
i486SX (P23) 16,20,25 MHz (33 MHz) 5V 8 KB WT September 1991 (September 1992)
i486DX2 (P24) 40/20, 50/25 MHz (66/33 MHz) 5V 8 KB WT March 1992 (August 1992)
i486DX-S (P4S) 33 MHz; 50 MHz 5V or 3.3V 8 KB WT June 1993
i486DX2-S (P24S) 40/20, 50/25 MHz (66/33 MHz) 5V or 3.3V 8 KB WT June 1993
i486SX-S (P23S) 25,33 MHz 5V or 3.3V 8 KB WT June 1993
i486SX2 50/25, 66/33 MHz 5V 8 KB WT March 1994
IntelDX4 (P24C) 75/25, 100/33 MHz 3.3V 16 KB WT March 1994
IntelDX4WB 100/33 MHz 3.3V 16 KB WB October 1994
i486DX2WB (P24D) 50/25, 66/33 MHz 5V 8 KB WB October 1994
i486DX2 (P24LM) 90/30 MHz; 100/33 MHz 2.5-2.9V 8 KB WT 1994

WT = Write-Through cache strategy, WB = Write-Back cache strategy


Competitive alternatives

486 compatible processors have been produced by other companies such as IBM, Texas Instruments, AMD, Cyrix, UMC, and SGS Thompson. Some were clones (identical at the microarchitectural level), others were clean-room implementations of the Intel instruction-set. (IBM's multiple source requirement is one of the reasons behind its x86-manufacturing since the 80286.) The 486 was, however, covered by many of Intel's patents covering new R&D as well as that of the prior 80386. Intel and IBM have broad cross-licenses of these patents, and AMD was granted rights to the relevant patents in the 1995 settlement of a lawsuit between the companies.[5]

AMD produced several clones of the 486 using a 40 MHz bus (486DX-40, 486DX/2-80, and 486DX/4-120) which had no equivalent available from Intel, as well as a part specified for 90 MHz, using a 30 MHz external clock, that was sold only to OEMs. The fastest running 486 CPU, the Am5x86, ran at 133 MHz and was released by AMD in 1995. 150 MHz and 160 MHz parts were planned but never officially released.

Cyrix made a variety of 486-compatible processors, positioned at the cost-sensitive desktop and low-power (laptop) markets. Unlike AMD's 486 clones, the Cyrix processors were the result of clean-room reverse-engineering. Cyrix's early offerings included the 486DLC and 486SLC, two hybrid chips which plugged into 386DX or SX sockets respectively, and offered 1 KB of cache (versus 8 KB for the then-current Intel/AMD parts). Cyrix also made "real" 486 processors, which plugged into the i486's socket and offered 2 or 8 KB of cache. Clock-for-clock, the Cyrix-made chips were generally slower than their Intel/AMD equivalents, though later products with 8 KB caches were more competitive, if not late to market.

The Motorola 68040 (best known for its use in the Macintosh Quadra series), while not compatible with the 486, was often positioned as the 486's equivalent in features and performance. While the 68040 outperformed the 486 significantly on a clock for clock basis, the 486 had the ability to be clocked significantly faster and it did not suffer from overheating problems. Until May 1994, Apple did not have any 68040-powered PowerBooks; prior to that, even Macworld reviewers conceded that the best choice for power users was the PC compatible Texas Instruments 486 notebook rather than Apple's top-of-the-line 68030-powered PowerBook 180. (TI has since sold its laptop business to Acer.)[citation needed]

Motherboards and buses

The first 486 system from Britain on the cover of BYTE

Early 486 machines were equipped with several ISA slots (using an emulated PC/AT-bus) and sometimes one or two 8-bit-only slots (compatible with the PC/XT-bus). [6] Many motherboards enabled overclocking of these up from the default 6 or 8 MHz to perhaps 16.5 or 20 MHz (half the i486 bus clock) in a number of steps, often from within the BIOS setup. Especially older peripheral cards normally worked well at such speeds as they often used standard MSI chips instead of slower (at the time) custom VLSI designs. This could give significant performance gains (such as for old video cards moved from a 386 or 286 computer, for example). However, operation beyond 8 or 10 MHz could sometimes lead to stability problems, at least in systems equipped with SCSI or sound cards.

Some motherboards came equipped with a 32-bit bus called EISA that was backward compatible with the ISA-standard. EISA offered a number of attractive features such as increased bandwidth, extended addressing, IRQ sharing, and card configuration through software (rather than through jumpers, DIP switches, etc) However, EISA cards were expensive and therefore mostly employed in servers and workstations. Consumer desktops often used the simpler but faster VESA Local Bus, unfortunately somewhat prone to electrical and timing-based instability; typical consumer desktops had ISA slots combined with a single VLB slot for a video card. VLB was gradually replaced by PCI during the final years of the 80486 period. Few Pentium motherboards had VLB support as VLB was based directly on the i486 bus; it was no trivial matter adapting it to the quite different Pentium-bus. ISA persisted through the original Pentium generation and was not completely displaced by PCI until the Pentium III era.

Late 486 boards were normally equipped with both PCI- and ISA-slots, and sometimes a single VLB slot as well. In this configuration VLB or PCI thoughput suffered depending on how buses were bridged. The VLB slot in these systems was usually only fully compatible with video cards (quite fitting as "VESA" stands for Video Electronics Standards Association); VLB-IDE, multi I/O, or SCSI cards could have problems on motherboards with PCI slots. The VL-Bus operated at the same clock speed as the i486-bus (basically being a local 486-bus) while the PCI bus also usually depended on the i486 clock but sometimes had a divider setting available via the BIOS. This could be set to 1/1 or 1/2, sometimes even 2/3 (for 50 MHz CPU clocks). Some motherboards limited the PCI clock to the specified maximum of 33 MHz and certain network cards depended on this frequency for correct bit-rates. The ISA clock was typically generated by a divider of the CPU/VLB/PCI clock (as implied above).

One of the earliest complete systems to use the 80486 chip was the Apricot VX FT, produced by United Kingdom hardware manufacturer Apricot Computers. Even overseas in the United States it drew attention as "The World's First 486" in a popular September 1989 issue of Byte magazine (shown right).

Later 486 boards also supported Plug-And-Play, the Microsoft technology designed to make component installation easier for consumers that began as a part of Windows 95.

Gaming

The 486DX2 66 MHz was the most widespread high-end 486 version.?[citation needed] For many players of video games during the early and mid 1990s, towards the end of the MS-DOS gaming era, it was often coupled with 8–16 MB RAM and a VESA Local Bus video card.

The introduction of 3D computer graphics spelled the end of the 486's reign, because 3D graphics make heavy use of floating point calculations, need faster CPU cache and more memory bandwidth. Developers began to target the Pentium almost exclusively with x86 assembly language optimizations (e.g. Quake); many of these games required the speed of the Pentium's double-pipelined architecture.

Obsolescence

The AMD Am5x86 and Cyrix Cx5x86 was the last 486 processors that were often used in late generation 486 motherboards with PCI slots and 72-pin SIMMs that are designed to be able to run Windows 95, and also often used as upgrades for older 486 motherboards. While the Cyrix Cx5x86 faded quite quickly when the Cyrix 6x86 took over, the AMD Am5x86 was important during the time when the AMD K5 was delayed.

In the general purpose desktop computer role, the 486s were used as budget machines for people who could not afford the latest computers, until around 2001, when Windows 95 support ended and Windows 98, ME, 2000, and XP required much more powerful computers to perform well. In fact, the Windows XP kernel could not run on a 486 at all due to the use of a new instruction introduced with the Pentium. [1]

Although the 486 became obsolete for personal computer applications by the mid-1990s, Intel had continued production for use in embedded systems. In May 2006 Intel announced that production of the 80486 would cease at the end of September 2007.[7]

See also

Notes and references

  1. ^ 80486 32-bit CPU breaks new ground in chip density and operating performance. (Intel Corp.) (product announcement) EDN | May 11, 1989 | Pryce, Dave
  2. ^ http://www.nytimes.com/1989/10/22/business/the-executive-computer-the-race-to-market-a-486-machine.html?pagewanted=1
  3. ^ The 386, 286, and even the 8086 was already somewhat pipelined, i.e they all had somewhat overlapping fetch, decode, execution (calculation), and write back; however, "tightly pipelined" (or "risc like") usually means that the pipeline stages overlaps 100% for important instructions, i.e. that all stages are bound to perform their respective duties within the same length time slot. In contrast "loosely pipelined" usually implies that some kind of buffering is used to decouple the units and allow them to work a little more independently. Both the original 8086 and the high performance x86-chips of today are, although very different, "loosely pipelined" in this sense.
  4. ^ The "low-end" 16 and 25 MHz 486 parts did not use a clock multiplier and are therefore comparable to a 386/286 clock by clock.
  5. ^ amd.com
  6. ^ In general, 8-bit ISA slots in these systems were implemented just by leaving off the shorter "C"/"D" connector of the slot, though the copper traces for a 16-bit slot were still there on the motherboard; the computer could tell no difference between an 8-bit ISA adapter in such a slot and the same adapter in a 16-bit slot, and there were still enough 8-bit adapters in circulation that vendors figured they could save money on a few connectors this way. Also, leaving off the 16-bit extension to the ISA connector allowed use of some early 8-bit ISA cards that otherwise could not be used due to the PCB "skirt" hanging down into that 16-bit extension space. IBM was the first to do this in the IBM AT.
  7. ^ reghardware.co.uk

This article is based on material taken from the Free On-line Dictionary of Computing prior to 1 November 2008 and incorporated under the "relicensing" terms of the GFDL, version 1.3 or later.