1801 series CPU

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For the 8-bit microprocessor family see RCA 1802
KL USSR K1801BM1 Ceramic.jpg
Produced 1980 onwards
Common manufacturer(s)
Max. CPU clock rate 2 MHz to 12 MHz
Instruction set Elektronika NC,

The 1801 series CPUs were a family of 16-bit Soviet microprocessors based on the indigenous Elektronika NC microarchitecture cores, but binary compatible with DEC's PDP-11 machines. First released in 1980, various models and variants of the series were among the most popular Soviet microprocessors and dominated embedded systems and military applications of the 1980s. They were also used in widely different areas such as graphing calculators (Elektronika MK-85) and industrial CNCs (Elektronika NC series), but arguably their most well-known use was in several Soviet general-purpose mini- and microcomputer designs like the SM EVM, DVK, UKNC, and BK families. Due to being the CPU of the popular Elektronika BK home computer, used in its late years as a demo machine, as well as the DVK micros that often offered a first glimpse into the UNIX world, this processor achieved something of a cult status among Soviet and then Russian programmers.


The history of this CPU stems from the early 1970s, when the group of engineers in Zelenograd's Special Computing Center, led by D.I. Yuditsky, developed their first 16-bit minicomputer, called Elektronika NC-1. This machine, intended to directly compete with SM EVM series, was first released in 1973 and used the bit slice 4-bit 587 CPU, sometimes called the first Soviet microprocessor ever. Its descendants proved popular and were widely used in various control systems and telecom equipment. However, the bit-slice nature of their CPUs made these machines somewhat unwieldy, especially in military applications, and the need for a single-chip microprocessor was identified.

In 1980 the first 1801 CPU intended to fill this niche, K1801VE1, entered production. It was essentially a microcontroller with 256 bytes of on-chip RAM, 2K ROM and other peripheral circuitry, still based on Elektronika NC instruction set, but compatible with a Soviet clone of DEC's Q-Bus that was already adopted as an industry standard — a first sign of things to come. Its peripheral circuits were underutilized by the industry, as it was mostly used as a general-purpose CPU, rather than a microcontroller, so it was decided to simplify the chip, removing unnecessary devices from the die. But by that time its parent organization, the SCC, has already lost in the power games that plagued Soviet industry.

By its nature, Soviet industry was an extremely bureaucratic structure, so decision making process was often driven not by technical or economical considerations, but by the results of the games of influence between various organizations and officials. SCC, despite its technical successes and popularity of its designs, was not without its opponents and even enemies. While its staff had an aversion to copying and reverse engineering Western technology, many groups within the Ministry of Electronic Industry argued for it as a quicker and more secure way to meet the needs. These groups eventually prevailed, and in 1976 the SCC was essentially disbanded, its technical base passing to the Angstrem plant while some of its research labs were joined to the Research Institute of Precision Technology (which didn't really need them), and others forming a research arm of the newly formed NPO Scientific Center.

This sudden reorganization resulted in the abandonment of the Elektronika NC architecture (it continued only in CNCs based on an NC-1 machine, some of which are used up to this day) and the adoption of the PDP-11 compatibility as a MEI standard, a process sometimes called PDP revolt in Russian literature. Thus, the microcode for the new simplified CPU was redesigned and made compatible with LSI-11 instruction set. The new processor was released in 1982, designated K1801VM1. It was supplemented by the 600-gate KR1801VP1 gate array, which was used to implement various support circuitry, 64 Kib KR1801RE2 ROM chip, and 64 Kib K573RF3 EPROM. Together they constituted the first widely used generation of 1801 family.

Technical characteristics[edit]

All CPUs in the family were single-chip 16-bit microprocessors based on Electronika NC microarchitecture, however only the first one, the K1801VE1 microcontroller, used the Electronica NC instruction set. Others have an updated microcode implementing the LSI-11 architecture. Various models differed in clock speed, instruction set (the first models lacked the MUL and DIV commands, for example), package and address bus width (the latest models supported 22-bit addressing).



  • Instruction set: LSI-11; supported EIS instructions: XOR, SOB, MUL (MUL only in 1801VM1G variant)
  • Technology: nMOS
  • Die size: 5x5 mm, 50000 transistors
  • Bus: МПИ (Q-Bus, multiplexed)
  • Clock speed: 100 kHz — 5 MHz
  • Voltage: +5 V
  • Power: 1.2 W
  • Package: 42-pin ceramic planar (K1801VM1, image above) or plastic planar (KR1801VM1)
  • Variants:[1](pp202-206)[2]
    • A (А) — max. clock frequency 5 MHz (often marked with one dot on the package)
    • B (Б) — max. clock frequency 4 MHz
    • V (В) — max. clock frequency 3 MHz
    • G (Г) — max. clock frequency 5 MHz; MUL instruction is supported (often marked with two dots on the package)


  • Instruction set: LSI-11 (MUL/DIV included, FIS codes implemented by ROM interrupt routines)
  • Technology: nMOS (a later CMOS version was designated 1806VM2)
  • Die size: 5.3x5.35 mm, 120000 transistors
  • Bus: МПИ (Q-Bus, multiplexed)
  • Clock speed: 2 — 10 MHz
  • Voltage: +5 V
  • Power: 1.7 W
  • Package: 40-pin CERDIP (KM1801VM2) or PDIP (KR1801VM2)

It has two different address spaces and the ability to quickly switch between them. They were used in implementing the FIS instruction subset, with instructions processed not in microcode, but as interrupt handlers in shadow ROM.


  • Military variant with tighter tolerances. PDIP package.


KM1801VM3, a later model chip in a CERDIP mount.
  • Instruction set: LSI-11 (EIS and MMU included)
  • Technology: nMOS (a later CMOS version was designated N1836VM3[2])
  • Die size: 6.65x8 mm, 200000 transistors
  • Bus: МПИ (Q-Bus, multiplexed)
  • Clock speed: 4 — 6 MHz, and 8 MHz from 1991
  • Voltage: +5 V
  • Power: 1.7 W
  • Package: 64-pin CERDIP (KM1801VM3) or 64-pin CQFP (N1801VM3)
  • Address bus: 22-bit
  • Supports floating point coprocessor


KN1801VM4 Engineering Sample.
KA1801VM4 Engineering Sample.
  • Floating point coprocessor for K1801VM3, 32/64 bit, clocked at 6 MHz (8 MHz after 1991)
  • Technology: nMOS (a later CMOS version was designated N1836VM4[2])
  • DEC PDP-11 FPU instructions LDUB, LDSC, STA0, STB0 and STQ0 have not been implemented.
  • Package: 64-pin plastic planar (KA1801VM4) or 64-pin CQFP (KN1801VM4)



  • Technology: CMOS
  • functionally equivalent to the nMOS K1801VM2[3]
  • Clock speed: 0 — 5 MHz
  • Voltage: +5 V
  • Package: 42-pin ceramic planar (1806VM2) or 64-pin CQFP (N1806VM2)[4]


These CPUs were used in:

  • Soyuz-Neon PC-11/16 PC, roughly similar to AT in performance (N1806VM2)
  • DVK series professional micros (various)
  • UKNC educational computers (KM1801VM2)
  • BK home computers (KM1801VM1)
  • Elektronika NC-31 lathe-control CNC
  • "Romashka" electronic typewriter
  • Various military and industrial applications

See also[edit]


  1. ^ Ниссельсон, Л.И. (1989). Цифровые и аналоговые интегральные микросхемы [Digital and analog integrated circuits] (in Russian). Радио и связь. ISBN 5256002597. 
  2. ^ a b c "1801ая серия" [1801 Series] (in Russian). Retrieved 11 July 2016. 
  3. ^ "1806ая серия" [1806 Series] (in Russian). Retrieved 11 July 2016. 
  4. ^ "16-разрядный LSI/2-совместимый микропроцессор" [16-bit LSI/2-compatible microprocessor] (in Russian). Zelenograd: Angstrem. Retrieved 11 July 2016.