# 555 timer IC

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Type Signetics NE555 in 8-pin DIP package Active, Integrated circuit Hans Camenzind (1971) 1972 Internal block diagram[1]

The 555 timer IC is an integrated circuit (chip) used in a variety of timer, delay, pulse generation, and oscillator applications. Derivatives provide two (556) or four (558) timing circuits in one package.[2] The design was first marketed in 1972 by Signetics.[3][4] Since then, numerous companies have made the original bipolar timers, as well as similar low-power CMOS timers. In 2017, it was said that over a billion 555 timers are produced annually by some estimates, and that the design was "probably the most popular integrated circuit ever made".[5]

## History

Silicon die of the first 555 chip (1971)
Die of a CMOS NXP ICM7555 chip

The timer IC was designed in 1971 by Hans Camenzind under contract to Signetics.[3] In 1968, he was hired by Signetics to develop a phase-locked loop (PLL) IC. He designed an oscillator for PLLs such that the frequency did not depend on the power supply voltage or temperature. Signetics subsequently laid off half of its employees due to the 1970 recession, and development on the PLL was thus frozen.[6] Camenzind proposed the development of a universal circuit based on the oscillator for PLLs and asked that he develop it alone, borrowing equipment from Signetics instead of having his pay cut in half. Camenzind's idea was originally rejected, since other engineers argued the product could be built from existing parts sold by the company; however, the marketing manager approved the idea.[7]

The first design for the 555 was reviewed in the summer of 1971. Assessed to be without error, it proceeded to layout design. A few days later, Camenzind got the idea of using a direct resistance instead of a constant current source, finding that it worked satisfactorily. The design change decreased the required 9 external pins to 8, so the IC could be fit in an 8-pin package instead of a 14-pin package. This revised version passed a second design review, and the prototypes were completed in October 1971 as the NE555V (plastic DIP) and SE555T (metal TO-5).[8] The 9-pin version had already been released by another company founded by an engineer who had attended the first review and had retired from Signetics; that firm withdrew its version soon after the 555 was released. The 555 timer was manufactured by 12 companies in 1972, and it became a best-selling product.[6]

### Name

Several books report the name "555" derived from the three 5 kΩ resistors inside the chip.[9][10][11] However, in a recorded interview with an online transistor museum curator,[12] Hans Camenzind said "It was just arbitrarily chosen. It was Art Fury [Marketing Manager] who thought the circuit was gonna sell big who picked the name '555'."[13]

## Design

Depending on the manufacturer, the standard 555 package incorporated the equivalent of 25 transistors, 2 diodes, and 15 resistors on a silicon chip packaged into an 8-pin dual in-line package (DIP-8).[14][15] Variants available included the 556 (a DIP-14 combining two complete 555s on one chip),[16] and 558 / 559 (both variants were a DIP-16 combining four reduced-functionality timers on one chip).[2]

The NE555 parts were commercial temperature range, 0 °C to +70 °C, and the SE555 part number designated the military temperature range, −55 °C to +125 °C. These chips were available in both high-reliability metal can (T package) and inexpensive epoxy plastic (V package) form factors. Thus, the full part numbers were NE555V, NE555T, SE555V, and SE555T.

Low-power CMOS versions of the 555 are now available, such as the Intersil ICM7555 and Texas Instruments LMC555, TLC555, TLC551.[17][18] [19][20]

### Internal schematic

The internal block diagram and schematic of the 555 timer are highlighted with the same color across all three drawings to clarify how the chip is implemented:[2]

• Voltage Divider: Between the positive supply voltage VCC and the ground GND is a voltage divider consisting of three identical resistors, which create two reference voltages at 13 VCC and 23 VCC. The latter is connected to the "Control" pin. All three resistors have the same resistance, 5 for bipolar timers, 100 kΩ (or higher) for CMOS timers.
• Threshold Comparator: The comparator's negative input is connected to the higher reference voltage divider of 23 VCC (and "Control" pin), and the comparator's positive input is connected to the "Threshold" pin.
• Trigger Comparator: The comparator's positive input is connected to the lower reference voltage divider of 13 VCC, and the comparator's negative input is connected to the "Trigger" pin.
• Flip-Flop: An SR flip-flop stores the state of the timer and is controlled by the two comparators. The "Reset" pin overrides the other two inputs, thus the flip-flop (and therefore the entire timer) can be reset at any time.
• Output: The output of the flip-flop is followed by an output stage with push-pull (P.P.) output drivers that can load the "Output" pin with up to 200 mA for bipolar timers, lower for CMOS timers.
• Discharge: Also, the output of the flip-flop turns on a transistor that connects the "Discharge" pin to the ground.

### Pinout

The pinout of the 8-pin 555 timer[1] and 14-pin 556 dual timer[21] are shown in the following table. Since the 556 is conceptually two 555 timers that share power pins, the pin numbers for each half are split across two columns.[2]

In the following table, longer pin designations are used, because manufacturers never standardized the abbreviated pin names across all datasheets.

555 pin# 556:1st pin# 556:2nd pin# Pin name Pin direction Pin description[1][21][2]
1
7
7
GND
Power
Ground supply: this pin is the ground reference voltage (zero volts).[22]
2
6
8
TRIGGER
Input
Trigger: when the voltage at this pin falls below 12 of the voltage of CONTROL (13 VCC, except when CONTROL is driven by an external signal), the OUTPUT goes to the high state and a timing interval starts.[22] As long as this pin continues to be kept at a low voltage, the OUTPUT will remain in the high state.
3
5
9
OUTPUT
Output
Output: this pin is a push-pull (P.P.) output that is driven to either a low state (GND) or a high state (for bipolar timers, VCC minus approximately 1.7 volts) (for CMOS timers, VCC). For bipolar timers, this pin can drive up to 200 mA, but CMOS timers are able to drive less (varies by chip). For bipolar timers, if this pin drives an edge-sensitive input of a digital logic chip, a 100 to 1000 pF decoupling capacitor (between this pin and GND) may need to be added to prevent double triggering.[2]
4
4
10
RESET
Input
Reset: a timing interval may be reset by driving this pin to GND, but the timing does not begin again until this pin rises above approximately 0.7 volts. This pin overrides TRIGGER, which in turn overrides THRESHOLD. If this pin is not used, it should be connected to VCC to prevent electrical noise accidentally causing a reset.[23][22]
5
3
11
CONTROL
Input
Control: this pin provides access to the internal voltage divider (23 VCC by default). By applying a voltage to this pin, the timing characteristics can be changed. In astable mode, this pin can be used to frequency-modulate the OUTPUT state. If this pin is not used, it should be connected to a 10 nF decoupling capacitor (between this pin and GND) to ensure electrical noise doesn't affect the internal voltage divider.[2][23][22]
6
2
12
THRESHOLD
Input
Threshold: when the voltage at this pin is greater than the voltage at CONTROL (23 VCC except when CONTROL is driven by an external signal), then the OUTPUT high state timing interval ends, causing the OUTPUT to go to the low state.[22]
7
1
13
DISCHARGE
Output
Discharge: For bipolar timers, this pin is an open-collector (O.C.) output, CMOS timers are open-drain (O.D.). This pin can be used to discharge a capacitor between intervals, in phase with the OUTPUT. In bistable mode and schmitt trigger mode, this pin is unused, which allows it to be used as an alternate output.[22]
8
14
14
VCC
Power
Positive supply: For bipolar timers, the voltage range is typically 4.5 to 16 volts, some are spec'ed for up to 18 volts, though most will operate as low as 3 volts. For CMOS timers, the voltage range is typically 2 to 15 volts, some are spec'ed for up to 18 volts, and some are spec'ed as low as 1 volt. See the supply min and max columns in the derivatives table in this article. Decoupling capacitor(s) are generally applied (between this pin and GND) as a good practice.[24][23]

## Modes

The 555 IC has the following operating modes:

1. Astable (free-running) mode – The 555 can operate as an electronic oscillator. Uses include LED and lamp flashers, pulse generation, logic clocks, tone generation, security alarms, pulse-position modulation, and so on. The 555 can be used as a simple ADC, converting an analog value to a pulse length (e.g., selecting a thermistor as timing resistor allows the use of the 555 in a temperature sensor with the period of the output pulse determined by the temperature). The use of a microprocessor-based circuit can then convert the pulse period to temperature, linearize it, and even provide calibration means.
2. Monostable (one-shot) mode – In this mode, the 555 functions as a "one-shot" pulse generator. Applications include timers, missing pulse detection, bounce-free switches, touch switches, frequency dividers, capacitance measurement, pulse-width modulation (PWM), and so on.
3. Bistable (flip-flop) mode – The 555 operates as an SR flip-flop. Uses include bounce-free latched switches.
4. Schmitt trigger (inverter) mode – the 555 operates as a Schmitt trigger inverter gate which converts a noisy input into a clean digital output.

### Astable

Schematic of a 555 timer in astable mode
Waveform in astable mode
Astable mode examples with common values
Frequency C R1 R2 Duty cycle
0.1 Hz (+0.048%) 100 µF 8.2 kΩ 68 kΩ 52.8%
1 Hz (+0.048%) 10 µF 8.2 kΩ 68 kΩ 52.8%
10 Hz (+0.048%) 1 µF 8.2 kΩ 68 kΩ 52.8%
100 Hz (+0.048%) 100 nF 8.2 kΩ 68 kΩ 52.8%
1 kHz (+0.048%) 10 nF 8.2 kΩ 68 kΩ 52.8%
10 kHz (+0.048%) 1 nF 8.2 kΩ 68 kΩ 52.8%
100 kHz (+0.048%) 100 pF 8.2 kΩ 68 kΩ 52.8%

In the astable configuration, the 555 timer puts out a continuous stream of rectangular pulses having a specific frequency. The astable configuration is implemented using two resistors, ${\displaystyle R_{1}}$ and ${\displaystyle R_{2}}$, and one capacitor ${\displaystyle C}$. In this configuration, the control pin is not used, thus it is connected to ground through a 10 nF decoupling capacitor to shunt electrical noise. The threshold and trigger pins are connected to the capacitor ${\displaystyle C}$; thus they have the same voltage.

Initially, the capacitor ${\displaystyle C}$ is not charged, thus the trigger pin receives zero voltage, which is less than 13 of the supply voltage. Consequently, the trigger pin causes the output to go high and the internal discharge transistor to go to cut-off mode. Since the discharge pin is no longer short-circuited to ground, the current flows through the resistors ${\displaystyle R_{1}}$ and ${\displaystyle R_{2}}$ to the capacitor, charging it. The capacitor ${\displaystyle C}$ starts charging until the voltage becomes 23 of the supply voltage.

At that time, the threshold pin causes the output to go low and the internal discharge transistor to go into saturation mode. Consequently, the capacitor starts discharging through ${\displaystyle R_{2}}$ until it becomes less than 13 of the supply voltage, at which point the trigger pin causes the output to go high and the internal discharge transistor to go to cut-off mode once again. And the cycle repeats.

During the first pulse, the capacitor charges from zero to 23 of the supply voltage, however, in later pulses, it only charges from 13 to 23 of the supply voltage. Consequently, the first pulse has a longer high time interval compared to later pulses. Moreover, the capacitor charges through both resistors but only discharges through ${\displaystyle R_{2}}$, thus the output high interval is longer than the low interval. This is shown in the following equations:

The output high time interval of each pulse is given by:

${\displaystyle t_{\text{high}}=\ln(2)\cdot (R_{1}+R_{2})\cdot C}$

The output low time interval of each pulse is given by:

${\displaystyle t_{\text{low}}=\ln(2)\cdot R_{2}\cdot C}$

Hence, the frequency ${\displaystyle f}$ of the pulse is given by:[25]

${\displaystyle f={\frac {1}{t_{\text{high}}+t_{\text{low}}}}={\frac {1}{\ln(2)\cdot (R_{1}+2R_{2})\cdot C}}}$

and the duty cycle (%) is given by:

${\displaystyle {\text{duty}}\%={\frac {t_{\text{high}}}{t_{\text{high}}+t_{\text{low}}}}\cdot 100={\frac {R_{1}+R_{2}}{R_{1}+2R_{2}}}\cdot 100}$

where ${\displaystyle t}$ is the time in seconds, ${\displaystyle R}$ is the resistance in ohms, ${\displaystyle C}$ is the capacitance in farads, and ${\displaystyle \ln(2)}$ is the natural logarithm of 2 (a constant which is 0.693147 when rounded to 6 significant digits), but it is commonly approximated with fewer digits in 555 timer books and datasheets, such as 0.7, 0.69, or 0.693.

Schematic of a 555 timer in astable mode with a 1N4148 diode to create a duty cycles less than 50%

Resistor ${\displaystyle R_{1}}$ requirements:

• ${\displaystyle W}$ power capability of ${\displaystyle R_{1}}$ must be greater than ${\displaystyle {\frac {V_{\text{CC}}\cdot V_{\text{CC}}}{R_{1}}}}$, per Ohm's law.
• Particularly with bipolar 555s, low values of ${\displaystyle R_{1}}$ must be avoided, so that the output stays saturated near zero volts during discharge, as assumed by the above equation. Otherwise, the output low time will be greater than calculated above.

The first cycle will take appreciably longer than the calculated time, as the capacitor must initially charge from 0 V to 23 of VCC from power-up, but only from 13 of VCC to 23 of VCC on subsequent cycles.

#### Shorter duty cycle

To create an output high time shorter than the low time (i.e., a duty cycle less than 50%) a fast diode (i.e. 1N4148 signal diode) can be placed in parallel with R2, with the cathode on the capacitor side. This bypasses R2 during the high part of the cycle, so that the high interval depends only on R1 and C, with an adjustment based the voltage drop across the diode. The voltage drop across the diode slows charging on the capacitor, so that the high time is longer than the expected and often-cited ln(2)⋅R1C = 0.693 R1C. The low time will be the same as above, 0.693  R2C. With the bypass diode, the high time is:

${\displaystyle t_{\text{high}}=\ln \left({\frac {2V_{\text{CC}}-3V_{\text{diode}}}{V_{\text{CC}}-3V_{\text{diode}}}}\right)\cdot R_{1}\cdot C,}$

where Vdiode is when the diode's "on" current is 12 of VCC/R1, which can be determined from its datasheet or by testing. As an extreme example, when VCC = 5 V, and Vdiode = 0.7 V, high time is 1.00 R1C, which is 45% longer than the "expected" 0.693 R1C. At the other extreme, when Vcc = 15 V, and Vdiode = 0.3 V, the high time is 0.725 R1C, which is closer to the expected 0.693 R1C. The equation reduces to the expected 0.693 R1C if Vdiode = 0 V.

### Monostable

Schematic of a 555 in monostable mode. Example values R = 220 kΩ, C = 100 nF for debouncing a pushbutton.
Waveform in monostable mode

In monostable mode, the output pulse ends when the voltage on the capacitor equals 23 of the supply voltage. The output pulse width can be lengthened or shortened to the need of the specific application by adjusting the values of R and C.[26]

The output pulse is of width t, which is the time it takes to charge C to 23 of the supply voltage. It is given by:

${\displaystyle t=\ln(3)\cdot R\cdot C,}$

where ${\displaystyle t}$ is the time in seconds, ${\displaystyle R}$ is the resistance in ohms, ${\displaystyle C}$ is the capacitance in farads, ${\displaystyle \ln(3)}$ is the natural log of 3 constant, which is 1.098612 (rounded to 6 significant digits), but it is commonly rounded to fewer digits in 555 timer books and datasheets, like 1.1 or 1.099.

While using the timer IC in monostable mode, the time span between any two triggering pulses must be greater than the RC time constant.[27]

#### Examples

Monostable mode examples with common values
Time C R
100 µs (−0.026%) 1 nF 91 kΩ
1 ms (−0.026%) 10 nF 91 kΩ
10 ms (−0.026%) 100 nF 91 kΩ
100 ms (−0.026%) 1 µF 91 kΩ
1 s (−0.026%) 10 µF 91 kΩ
10 s (−0.026%) 100 µF 91 kΩ

Using the algebraic timing formula (above) and component values from the example table (right), time is calculated as follows:

${\displaystyle t=\ln(3)\cdot R\cdot C}$

when R is 91 kΩ and C is 100 nF

${\displaystyle t=\ln(3)\cdot 91k\cdot 100n}$

is converted into the expected units: ${\displaystyle \ln(3)}$ is natural log of 3, ${\displaystyle R}$ is resistance in ohms, ${\displaystyle C}$ is capacitance in farads,

${\displaystyle t=1.098612\cdot 91000\cdot 0.0000001}$

is multiplied together

${\displaystyle t=0.0099973692}$ seconds, which is approximately 10 ms (−0.026%)

Using algebraic math, component values can be scaled by powers of 10 to get the same timing:

• 10 ms (−0.026%) = 10 nF and 910 kΩ
• 10 ms (−0.026%) = 100 nF and 91 kΩ : (values from table)
• 10 ms (−0.026%) = 1000 nF and 9.1 kΩ : (1000 nF is 1 µF)

For each row in the example table (right), two additional timing values can easily be created by adding a second resistor in parallel or series. In parallel, the new timing is half the table time. In series, the new timing is double the table time.

• 5 ms (−0.026%) = 100 nF and 45.5 kΩ : (two 91 kΩ resistors in parallel)
• 10 ms (−0.026%) = 100 nF and 91 kΩ : (values from table)
• 20 ms (−0.026%)= 100 nF and 182 kΩ : (two 91 kΩ resistors in series)

### Bistable

Schematic of a 555 in bistable flip-flop mode. High-value pull-up resistors should be added to the two inputs.
Inverted SR flip-flop symbol (without /Q) is similar to circuit on right

In bistable mode, the 555 timer acts as an SR flip-flop. The trigger and reset inputs are held high via pull-up resistors while the threshold input is grounded. Thus configured, pulling the trigger momentarily to ground acts as a "set" and transitions the output pin to VCC (high state). Pulling the reset input to ground acts as a "reset" and transitions the output pin to ground (low state). No timing capacitors are required in a bistable configuration. The discharge pin is left unconnected or may be used as an open-collector output.[28]

### Schmitt trigger

Schematic of a 555 in bistable Schmitt trigger mode. Example values R1 and R2 = 100 kΩ, C = 10 nF.
Schmitt trigger inverter gate (lower symbol) is similar to circuit on right

A 555 timer can be used to create a Schmitt trigger inverter gate which converts a noisy input into a clean digital output. The input signal should be connected through a series capacitor, which then connects to the trigger and threshold pins. A resistor divider, from VCC to GND, is connected to the previous tied pins. The reset pin is tied to VCC.

## Packages

Texas Instruments NE555 in DIP-8 and SO-8 packages[1]

In 1972, Signetics originally released the 555 timer in DIP-8 and TO5-8 metal can packages, and the 556 timer was released in a DIP-14 package.[4]

In 2006, the dual 556 timer was available in through-hole packages as DIP-14 (2.54 mm pitch),[21] and surface-mount packages as SO-14 (1.27 mm pitch) and SSOP-14 (0.65 mm pitch).

In 2012, the 555 was available in through-hole packages as DIP-8 (2.54 mm pitch),[29] and surface-mount packages as SO-8 (1.27 mm pitch), SSOP-8 / TSSOP-8 / VSSOP-8 (0.65 mm pitch), BGA (0.5 mm pitch).[1]

The MIC1555 is a CMOS 555-type timer with three fewer pins available in SOT23-5 (0.95 mm pitch) surface-mount package.[30]

## Specifications

555 timer circuit in a solderless breadboard

These specifications apply to the original bipolar NE555. Other 555 timers can have different specifications depending on the grade (industrial, military, medical, etc.).

 Part number NE555 IC Process Bipolar Supply voltage (VCC) 4.5 to 16 V Supply current (VCC = +5 V) 3 to 6 mA Supply current (VCC = +15 V) 10 to 15 mA Output current (maximum) 200 mA Maximum Power dissipation 600 mW Power consumption (minimum operating) 30 mW @ 5 V,225 mW @ 15 V Operating temperature 0 to 70 °C

## Derivatives

Numerous companies have manufactured one or more variants of the 555, 556, 558 timers over the past decades, under many different part numbers. The following is a partial list:

Manufacturer Part
number
Production
status
IC
process
Timers
total
Supply
min. (volt)
Supply
max. (volt)
Iq (μA)
at 5 V
supply
Frequency
max. (MHz)
Remarks Datasheet
Custom Silicon Solutions (CSS) CSS555 Active CMOS 1 1.2 5.5 4.3 1.0 Internal EEPROM, requires programmer [31][32][33]
Diodes Inc ZSCT1555 Discontinued Bipolar 1 0.9 6 150 0.33 Designed by Camenzind [34]
Japan Radio Company (JRC) NJM555 Discontinued Bipolar 1 4.5 16 3000 0.1* Also available in SIP-8 [29]
Microchip MIC1555 Active CMOS 1* 2.7 18 240 5.0* Reduced features, only available in SOT23-5 [30]
ON MC1455 Active Bipolar 1 4.5 16 3000 0.1* [35]
Renesas ICM7555 Active CMOS 1 2 18 40 1.0 [17]
Renesas ICM7556 Active CMOS 2 2 18 80 1.0 [17]
Signetics NE555 Active (TI) Bipolar 1 4.5 16 3000 0.1* First 555 timer, DIP-8 or TO5-8 [4][16][36][2]
Signetics NE556 Active (TI) Bipolar 2 4.5 16 6000 0.1* First 556 timer, DIP-14 [16][2]
Signetics NE558 Discontinued Bipolar 4* 4.5 16 4800* 0.1* First 558 timer, DIP-16 [2]
STMicroelectronics (ST) TS555 Active CMOS 1 2 16 110 2.7 [37]
Texas Instruments (TI) LM555 Active Bipolar 1 4.5 16 3000 0.1 [27]
Texas Instruments LM556 Discontinued Bipolar 2 4.5 16 6000 0.1 [38]
Texas Instruments LMC555 Active CMOS 1 1.5 15 100 3.0 Also available in DSBGA-8 [18]
Texas Instruments NE555 Active Bipolar 1 4.5 16 3000 0.1* [1]
Texas Instruments NE556 Active Bipolar 2 4.5 16 6000 0.1* [21]
Texas Instruments TLC551 Active CMOS 1 1 15 170 1.8 [20]
Texas Instruments TLC552 Active CMOS 2 1 15 340 1.8 [39]
Texas Instruments TLC555 Active CMOS 1 2 15 170 2.1 [19]
Texas Instruments TLC556 Active CMOS 2 2 15 340 2.1 [40]
X-REL XTR655 Active SOI 1 2.8 5.5 170 4.0 Extreme (−60 °C to +230 °C), ceramic DIP-8 or bare die [41]
Table notes
• All information in the above table was pulled from references in the datasheet column, except where denoted below.
• For the "Total timers" column, a "*" denotes parts that are missing 555 timer features.
• For the "Iq" column, a 5-volt supply was chosen as a common voltage to make it easier to compare. The value for Signetics NE558 is an estimate because NE558 datasheets don't state Iq at 5 V.[2] The value listed in this table was estimated by comparing the 5 V to 15 V ratio of other bipolar datasheets, then derating the 15 V parameter for the NE558 part, which is denoted by the "*".
• For the "Frequency max." column, a "*" denotes values that may not be the actual maximum frequency limit of the part. The MIC1555 datasheet discusses limitations from 1 to 5 MHz.[30] Though most bipolar timers don't state the maximum frequency in their datasheets, they all have a maximum frequency limitation of hundreds of kHz across their full temperature range. Section 8.1 of the Texas Instruments NE555 datasheet[1] states a value of 100 kHz, and their website shows a value of 100 kHz in timer comparison tables. Signetics App Note 170 states that most devices will oscillate up to 1 MHz; however, when considering temperature stability, it should be limited to about 500 kHz.[2] The application note from HFO mentions that at higher supply voltages the maximum power dissipation of the circuit might limit the operating frequency, as the supply current increases with frequency.[42]
• For the "Manufacturer" column, the following associates historical 555 timer manufacturers to current company names.

### 556 dual timer

Die of a NE556 dual timer manufactured by STMicroelectronics
Pinout of 556 dual timer[21][16]

The dual version is called 556. It features two complete 555 timers in a 14-pin package; only the two power-supply pins are shared between the two timers.[21][16] In 2020, the bipolar version was available as the NE556,[21] and the CMOS versions were available as the Intersil ICM7556 and Texas Instruments TLC556 and TLC552. See derivatives table in this article.[17][40][39]

### 558 quad timer

Die of a NE558 quad timer manufactured by Signetics
Pinout of 558 quad timer[2]
558 internal block diagram. It is different from 555 and 556 timers.[2]

The quad version is called 558 and has four reduced-functionality timers in a 16-pin package designed primarily for "monostable multivibrator" applications.[51][2] By 2014, many versions of 16-pin NE558 have become obsolete.[52]

Partial list of differences between 558 and 555 chips:[2][52]

• One VCC and one GND, similar to 556 chip.
• Four "Reset" are tied together internally to one external pin (558).
• Four "Control Voltage" are tied together internally to one external pin (558).
• Four "Triggers" are falling-edge sensitive (558), instead of level sensitive (555).
• Two resistors in the voltage divider (558), instead of three resistors (555).
• One comparator (558), instead of two comparators (555).
• Four "Output" are open-collector (O.C.) type (558), instead of push–pull (P.P.) type (555).

## References

1. "NE555 Datasheet" (PDF). Texas Instruments. September 2014. Archived (PDF) from the original on June 28, 2017.
2. ^ a b Fuller, Brian (15 August 2012). "Hans Camenzind, 555 timer inventor, dies". EE Times. Retrieved 27 December 2016.
3. ^ a b c "Linear Vol1 Databook". Signetics. 1972.
4. ^ Lowe, Doug (2017-02-06). Electronics All-in-One For Dummies. Wiley. p. 339. ISBN 978-1-119-32079-1. The 555 timer chip, developed in 1970, is probably the most popular integrated cirucit ever made. By some estimates, more than a billion of them are manufactured every year.
5. ^ a b Carmenzind, Hans (2010). Translated by 三宅, 和司. "タイマIC 555 誕生秘話" [The birth of the 555 timer IC]. トランジスタ技術 (Transistor Technology) (in Japanese). CQ出版. 47 (12): 73, 74. ISSN 0040-9413.
6. ^ Santo, Brian (May 2009). "25 Microchips That Shook the World". IEEE Spectrum. 46 (5): 34–43. doi:10.1109/MSPEC.2009.4907384. S2CID 20539726.
7. ^ Ward, Jack (2004). "The 555 Timer IC – An Interview with Hans Camenzind". The Semiconductor Museum. Retrieved 2010-04-05.
8. ^ Scherz, Paul; Monk, Simon (2016). Practical Electronics for Inventors (4th ed.). McGraw Hill. p. 687. ISBN 978-1-259-58755-9. The 555 gets its name from the three 5-kW +VCC R1 discharging path 555 R 2 C 6 resistors shown in the block diagram. These resistors act as a three-step voltage.
9. ^ Kleitz, William (1990). Digital electronics : a practical approach (2nd ed.). Prentice Hall. p. 401. ISBN 0-13-211657-X. OCLC 20218185. The 555 got its name from the three 5-kOhm resistors
10. ^ Simpson, Colin D. (1996). Industrial electronics. Prentice Hall. p. 357. ISBN 0-02-410622-4. OCLC 33014077. The reference voltage for the comparators is established by a voltage divider consisting of three 5 - k2 resistors , which is where the name 555 is derived
11. ^ GoldStein, Harry (March 3, 2003). "The Irresistible Transistor". IEEE Spectrum. 40 (3): 42–47. doi:10.1109/MSPEC.2003.1184435. Retrieved 2020-08-29.
12. ^ "Oral History Hans Camenzind Historic 555 IC Page2". The Semiconductor Museum. Retrieved 2020-08-28.
13. ^ van Roon 2007, Fig 3 & related text
14. ^ "Oral History Hans Camenzind Historic 555 Integrated Circuit Page6". Semiconductor Museum. Retrieved 2022-02-27.
15. "555/556 Timers Databook" (PDF). Signetics. 1973. Archived (PDF) from the original on May 11, 2021.
16. ^ a b c d "ICM7555-556 Datasheet" (PDF). Intersil. June 2016. Archived from the original (PDF) on June 29, 2017.
17. ^ a b "LMC555 Datasheet" (PDF). Texas Instruments. July 2016. Archived (PDF) from the original on June 28, 2017.
18. ^ a b "TLC555 Datasheet" (PDF). Texas Instruments. August 2016. Archived (PDF) from the original on June 28, 2017.
19. ^ a b "TLC551 Datasheet" (PDF). Texas Instruments. September 1997. Archived (PDF) from the original on June 29, 2017.
20. "NE556 Datasheet" (PDF). Texas Instruments. June 2006. Archived (PDF) from the original on June 29, 2017.
21. Jung, Walt (1977). IC Timer Cookbook (1 ed.). Sams Publishing. ISBN 978-0672219320.
22. ^ a b c Lancaster, Don (1974). TTL Cookbook. Sams. ISBN 978-0672210358.
23. ^ Carr, Joseph (1996-12-19). Linear IC Applications: A Designer's Handbook. Newnes. p. 119. ISBN 978-0-7506-3370-3.
24. ^ van Roon 2007, Astable operation
25. ^ van Roon 2007, Monostable Mode (Using the 555 timers as a logic clock).
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## Further reading

Books
Books with timer chapters
Datasheets
• See links in "Derivatives" table and "References" section in this article.