From Wikipedia, the free encyclopedia
Jump to: navigation, search

In digital circuits, an adder–subtractor is a circuit that is capable of adding or subtracting numbers (in particular, binary). Below is a circuit that does adding or subtracting depending on a control signal. It is also possible to construct a circuit that performs both addition and subtraction at the same time.


A 4-bit ripple-carry adder–subtractor based on a 4-bit adder that performs two's complement on when to yield

Having an n-bit adder for and , then . Then, assume the numbers are in two's complement. Then to perform , two's complement theory says to invert each bit with a NOT gate then add one. This yields , which is easy to do with a slightly modified adder.

By preceding each input bit on the adder with a 2-to-1 multiplexer where:

  • Input 0 () is
  • Input 1 () is

that has control input that is also connected to the initial carry, then the modified adder performs

  • addition when, or
  • subtraction when .

This works because when the input to the adder is really and the carry in is . Adding to and yields the desired subtraction of .

A way you can mark number as positive or negative without using a multiplexer on each bit is to use a XOR (Exclusive OR) gate to precede each bit instead.

  • First input to the XOR gate is the actual input bit
  • Second input to the XOR gate for each is the control input

This produces the same truth table for the bit arriving at the adder as the multiplexer solution does since the XOR gate output will be what the input bit is when and the inverted input bit when .

Role in the arithmetic logic unit[edit]

Main article: Arithmetic logic unit

Adders are a part of the core of an arithmetic logic unit (ALU). The control unit decides which operations an ALU should perform (based on the op code being executed) and sets the ALU operation. The input to the adder–subtractor above would be one such control line from the control unit.

The adder–subtractor above could easily be extended to include more functions. For example, a 2-to-1 multiplexer could be introduced on each that would switch between zero and ; this could be used (in conjunction with ) to yield the two's complement of since .

A further step would be to change the 2-to-1 mux on to a 4-to-1 with the third input being zero, then replicating this on thus yielding the following output functions:

  • (with the both and input set to zero and )
  • (with the both and input set to zero and )
  • (with the input set to zero)
  • (with the input set to zero)
  • (with the input set to zero and )
  • (with the input set to zero and )
  • (with set to invert; set to zero; and )
  • (with set to invert; set to zero; and )
  • (with set to invert; set to zero; and )
  • (with set to invert; set to zero; and )

By adding more logic in front of the adder, a single adder can be converted into much more than just an adder—an ALU.

See also[edit]