Adiabatic circuit

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Adiabatic circuits are low power circuits which use "reversible logic" to conserve energy.[1]

Unlike traditional CMOS circuits, which dissipate energy during switching, adiabatic circuits reduce dissipation by following two key rules:

  1. Never turn on a transistor when there is a voltage potential between the source and drain.
  2. Never turn off a transistor when current is flowing through it.

While this is an area of active research, current techniques rely heavily on transmission gates and trapezoidal clocks to achieve these goals.

CMOS adiabatic circuits[edit]

There are some classical approaches to reduce the dynamic power such as reducing supply voltage, decreasing physical capacitance and reducing switching activity. These techniques are not fit enough to meet today’s power requirement. However, most research has focused on building adiabatic logic, which is a promising design for low power applications.

Adiabatic logic works with the concept of switching activities which reduces the power by giving stored energy back to the supply. Thus, the term adiabatic logic is used in low-power VLSI circuits which implements reversible logic. In this, the main design changes are focused in power clock which plays the vital role in the principle of operation. Each phase of the power clock gives user to achieve the two major design rules for the adiabatic circuit design.

  • Never turn on a transistor if there is a voltage across it (VDS > 0)
  • Never turn off a transistor if there is a current through it (IDS ≠ 0)
  • Never pass current through a diode

If these conditions with regard to the inputs, in all the four phases of power clock, recovery phase will restore the energy to the power clock, resulting considerable energy saving. Yet some complexities in adiabatic logic design perpetuate. Two such complexities, for instance, are circuit implementation for time-varying power sources needs to be done and computational implementation by low overhead circuit structures needs to be followed.

There are two big challenges of energy recovering circuits; first, slowness in terms of today’s standards, second it requires ~50% of more area than conventional CMOS, and simple circuit designs get complicated.

The basic concepts of Adiabatic logic will be introduced.

“Adiabatic” is a term of Greek origin that has spent most of its history associated with classical thermodynamics. It refers to a system in which a transition occurs without energy (usually in the form of heat) being either lost to or gained from the system. In the context of electronic systems, rather than heat, electronic charge is preserved. Thus, an ideal adiabatic circuit would operate without the loss or gain of electronic charge. The first usage of the term “Adiabatic” in this context appears to be traceable back to a paper presented in 1992 at the Second Workshop on Physics and Computation. Although an earlier suggestion of the possibility of energy recovery was made by Bennett where in relation to the energy used to perform computation, he stated “This energy could in principle be saved and reused”.

Etymology of the term “adiabatic logic”. Because of the Second Law of Thermodynamics, it is not possible to completely convert energy into useful work. However, the term “Adiabatic Logic” is used to describe logic families that could theoretically operate without losses. The term “Quasi-Adiabatic Logic” is used to describe logic that operates with a lower power than static CMOS logic, but which still has some theoretical non-adiabatic losses. In both cases, the nomenclature is used to indicate that these systems are capable of operating with substantially less power dissipation than traditional static CMOS circuits.

There are several important principles that are shared by all of these low-power adiabatic systems. These include only turning switches on when there is no potential difference across them, only turning switches off when no current is flowing through them, and using a power supply that is capable of recovering or recycling energy in the form of electric charge. To achieve this, in general, the power supplies of adiabatic logic circuits have used constant current charging (or an approximation thereto), in contrast to more traditional non-adiabatic systems that have generally used constant voltage charging from a fixed-voltage power supply.

The power supplies of adiabatic logic circuits have also used circuit elements capable of storing energy. This is often done using inductors, which store the energy by converting it to magnetic flux. There are a number of synonyms that have been used by other authors to refer to adiabatic logic type systems, these include: “Charge recovery logic”, “Charge recycling logic”, “Clock-powered logic”, “Energy recovery logic” and “Energy recycling logic”. Because of the reversibility requirements for a system to be fully adiabatic, most of these synonyms actually refer to, and can be used inter-changeably, to describe quasi-adiabatic systems. These terms are succinct and self-explanatory, so the only term that warrants further explanation is “Clock-Powered Logic”. This has been used because many adiabatic circuits use a combined power supply and clock, or a “power-clock”. This a variable, usually multi-phase, power-supply which controls the operation of the logic by supplying energy to it, and subsequently recovering energy from it.

Because high-Q inductors are not available in CMOS, inductors must be off-chip, so adiabatic switching with inductors are limited to designs which use only a few inductors. Quasi-adiabatic stepwise charging avoids inductors entirely by storing recovered energy in capacitors.[2][3] Stepwise charging (SWC) can use on-chip capacitors.[4]:26

Asynchrobatic Logic, introduced in 2004,[4]:51 is a CMOS logic family design style using internal stepwise charging that attempts to combine the low-power benefits of the seemingly contradictory ideas of "clock-powered logic" (adiabatic circuits) and "circuits without clocks" (asynchronous circuits).[4]:3[5][6]

See also[edit]


  1. ^ "Adiabatic Logic", Benjamin Gojman August 8, 2004
  2. ^ G. Schrom. "Adiabatic CMOS".
  3. ^ Philip Teichmann. "Adiabatic Logic: Future Trend and System Level Perspective". 2011. p. 65.
  4. ^ a b c Willingham, David John. "Asynchrobatic logic for low-power VLSI design". 2010.
  5. ^ Willingham, D.J.; Kale, I. "Asynchronous, quasi-Adiabatic (Asynchrobatic) logic for low-power very wide data width applications". 2004. doi:10.1109/ISCAS.2004.1329257
  6. ^ Willingham, D.J.; Kale, I. "A system for calculating the Greatest Common Denominator implemented using Asynchrobatic Logic". 2008. doi:10.1109/NORCHP.2008.4738310

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