|Product family||Manchester computers|
|Units sold||3 (+ 3 Atlas 2)|
The Atlas Computer was one of the world's first supercomputers, in use from 1962 until 1971. It was considered to be the most powerful computer in the world at that time. Atlas' capacity promoted the saying that when it went offline, half of the United Kingdom's computer capacity was lost. It is notable for being the first machine with virtual memory (at that time referred to as 'one-level store') using paging techniques; this approach quickly spread, and is now ubiquitous.
Atlas was a second-generation computer, using discrete germanium transistors. Atlas was created in a joint development effort among the University of Manchester, Ferranti International plc and the Plessey Co., plc. Two other Atlas machines were built: one for British Petroleum and the University of London, and one for the Atlas Computer Laboratory at Chilton near Oxford.
A derivative system was built by Ferranti for Cambridge University. Called the Titan, or Atlas 2, it had a different memory organisation and ran a time-sharing operating system developed by Cambridge University Computer Laboratory. Two further Atlas 2s were delivered: one to the CAD Centre in Cambridge (later called CADCentre, then AVEVA), and the other to the Atomic Weapons Research Establishment (AWRE), Aldermaston.
The University of Manchester's Atlas was decommissioned in 1971. The final Atlas, the CADCentre machine, was switched off in late 1976. Parts of the Chilton Atlas are preserved by National Museums Scotland in Edinburgh; the main console itself was rediscovered in July 2014 and is at Rutherford Appleton Laboratory in Chilton, near Oxford.
Through 1956 there was a growing awareness that the UK was falling behind the US in computer development. In April, B.W. Pollard of Ferranti told a computer conference that "there is in this country a range of medium-speed computers, and the only two machines which are really fast are the Cambridge EDSAC 2 and the Manchester Mark 2, although both are still very slow compared with the fastest American machines." This was followed by similar concerns expressed in May report to the Department of Scientific and Industrial Research Advisory Committee on High Speed Calculating Machines, better known as the Brunt Committee.
Through this period, Tom Kilburn's team at Manchester University had been experimenting with transistor-based systems, building two small machines to test various techniques. This was clearly the way forward, and in the fall of 1956, Kilburn began canvassing possible customers on what features they would want in a new transistor-based machine. Most commercial customers pointed out the need to support a wide variety of peripheral devices, while the Atomic Energy Authority suggested a machine able to perform an instruction every microsecond, or as it would be known today, 1 MIPS of performance. This later request led to the name of the prospective design, MUSE, for microsecond engine.
The need to support many peripherals and the need to run fast are naturally at odds. A program that processes data from a card reader, for instance, will spend the vast majority of its time waiting for the reader to send in the next bit of data. To support these devices while still making efficient use of the central processing unit (CPU), the new system would need to have additional memory to buffer data and have an operating system that could coordinate the flow of data around the system.
Muse becomes Atlas
When the Brunt Committee heard of new and much faster US designs, the Univac LARC and IBM STRETCH, they were able to gain the attention of the National Research Development Corporation (NRDC), responsible for moving technologies from war-era research groups into the market. Over the next eighteen months, they held numerous meetings with prospective customers, engineering teams at Ferranti and EMI, and design teams at Manchester and the Royal Radar Establishment.
In spite of all this effort, by the summer of 1958, there was still no funding available from the NRDC. Kilburn decided to move things along by building a smaller Muse to experiment with various concepts. This was paid for using funding from the Mark 1 Computer Earnings Fund, which collected funds by renting out time on the University's Mark 1. Soon after the project started, in October 1958, Ferranti decided to become involved. In May 1959 they received a grant of £300,000 from the NRDC to build the system, which would be returned from the proceeds of sales. At some point during this process, the machine was renamed Atlas.
The detailed design was completed by the end of 1959, and the construction of the compilers was proceeding. However, the Supervisor operating system was already well behind. This led to David Howarth, newly hired at Ferranti, expanding the operating system team from two to six programmers. In what is described as a herculean effort, led by the tireless and energetic Howarth,[a] the team eventually delivered a Supervisor consisting of 35,000 lines of assembler language which had support for multiprogramming to solve the problem of peripheral handling.
The first Atlas was built up at the university throughout 1962. The schedule was further constrained by the planned shutdown of the Ferranti Mercury machine at the end of December. Atlas met this goal, and was officially commissioned on 7 December by John Cockcroft, director of the AEA. This system had only an early version of Supervisor, and the only compiler was for Autocode. It was not until January 1964 that the final version of Supervisor was installed, along with compilers for ALGOL 60 and Fortran.
By the mid-1960s the original machine was in continual use, based on a 20-hour-per-day schedule, during which time as many as 1,000 programs might be run. Time was split between the University and Ferranti, the latter of which charged £500 an hour to its customers. A portion of this was returned to the University Computer Earnings Fund. In 1969, it was estimated that the computer time received by the University would cost £720,000 if it had been leased on the open market. The machine was shut down on 30 November 1971.
Ferranti sold two other Atlas installations, one to a joint consortium of London University and British Petroleum in 1963, and another to the Atomic Energy Research Establishment (Harwell) in December 1964. The AEA machine was later moved to the Atlas Computer Laboratory at Chilton, a few yards outside the boundary fence of Harwell, which placed it on civilian lands and thus much easier to access. This installation grew to be the largest Atlas, containing 48 kWords of 48-bit core memory and 32 tape drives. Time was made available to all UK universities. It was shut down in March 1974.
Titan and Atlas 2
In February 1962, Ferranti gave some parts of an Atlas machine to Cambridge University, and in return, the University would use these to develop a cheaper version of the system. The result was the Titan machine, which became operational in the summer of 1963. Ferranti sold two more of this design under the name Atlas 2, one to the Atomic Weapons Research Establishment (Aldermaston) in 1963, and another to the government-sponsored Computer Aided Design Center in 1966.
Atlas had been designed as a response to the US LARC and STRETCH programs. Both ultimately beat Atlas into official use, LARC in 1961, and STRETCH a few months before Atlas. Atlas was much faster than LARC, about four times, and ran slightly slower than STRETCH - Atlas added two floating-point numbers in about 1.59 microseconds, while STRETCH did the same in 1.38 to 1.5 microseconds. No further sales of LARC were attempted, and it is not clear how many STRETCH machines were ultimately produced.
It was not until 1964's arrival of the CDC 6600 that the Atlas was significantly bested. CDC later stated that it was a 1959 description of Muse that gave CDC ideas that significantly accelerated the development of the 6600 and allowed it to be delivered earlier than originally estimated. This led to it winning a contract for the CSIRO in Australia, which had originally been in discussions to buy an Atlas.
Ferranti was having serious financial difficulties in the early 1960s, and decided to sell the computer division to International Computers and Tabulators (ICT) in 1963. ICT decided to focus on the mid-range market with their ICT 1900 series, a flexible range of machines based on the Canadian Ferranti-Packard 6000.
The machine had many innovative features, but the key operating parameters were as follows (the store size relates to the Manchester installation; the others were larger):
- 48-bit word size. A word could hold one floating-point number, one instruction, two 24-bit addresses or signed integers, or eight 6-bit characters.
- A fast adder that used novel circuitry to minimise carry propagation time.
- 24-bit (2 million words, 16 million characters) address space that embraced supervisor ('sacred') store, V-store, fixed store and the user store
- 16K words of core store (equivalent to 96 KB), featuring interleaving of odd/even addresses
- 8K words of read-only memory (referred to as the fixed store). This contained the supervisor and extracode routines.
- 96K words of drum store (eqv. to 576 KB), split across four drums but integrated with the core store using virtual memory. The page size was 512 words, i.e 3072 bytes.
- 128 high-speed index registers (B-lines) that could be used for address modification in the mostly double-modified instructions. The register address space also included special registers such as the extracode operand address and the exponent of the floating-point accumulator. Three of the 128 registers were program counter registers: 125 was supervisor (interrupt) control, 126 was extracode control, and 127 was user control. Register 0 always held value 0.
- Capability for the addition of (for the time) sophisticated new peripherals such as magnetic tape, including direct memory access (DMA) facilities
- Peripheral control through V-store addresses (memory-mapped I/O), interrupts and extracode routines, by reading and writing special wired-in store addresses.
- An associative memory (content-addressable memory) of page address registers to determine whether the desired virtual memory location was in core store
- Instruction pipelining
Atlas did not use a synchronous clocking mechanism—it was an asynchronous Processor—so performance measurements were not easy but as an example:
- Fixed-point register add – 1.59 microseconds
- Floating-point add, no modification – 1.61 microseconds
- Floating-point add, double modify – 2.61 microseconds
- Floating-point multiply, double modify – 4.97 microseconds
One feature of the Atlas was "Extracode", a technique that allowed complex instructions to be implemented in software. Dedicated hardware expedited entry to and return from the extracode routine and operand access; also, the code of the extracode routines was stored in ROM, which could be accessed faster than the core store.
The uppermost ten bits of a 48-bit Atlas machine instruction were the operation code. If the most significant bit was set to zero, this was an ordinary machine instruction executed directly by the hardware. If the uppermost bit was set to one, this was an Extracode and was implemented as a special kind of subroutine jump to a location in the fixed store (ROM), its address being determined by the other nine bits. About 250 extracodes were implemented, of the 512 possible.
Extracodes were what would be called software interrupt or trap today. They were used to call mathematical procedures which would have been too inefficient to implement in hardware, for example sine, logarithm, and square root. But about half of the codes were designated as Supervisor functions, which invoked operating system procedures. Typical examples would be "Print the specified character on the specified stream" or "Read a block of 512 words from logical tape N". Extracodes were the only means by which a program could communicate with the Supervisor. Other UK machines of the era, such as the Ferranti Orion, had similar mechanisms for calling on the services of their operating systems.
One of the first high-level languages available on Atlas was named Atlas Autocode, which was contemporary to Algol 60 and created specifically to address what Tony Brooker perceived to be some defects in Algol 60. The Atlas did however support Algol 60, as well as Fortran and COBOL, and ABL (Atlas Basic Language, a symbolic input language close to machine language). Being a university computer it was patronised by a large number of the student population, who had access to a protected machine code development environment.
Several of the compilers were written using the Compiler Compiler, considered to be the first of its type.
It also had a programming language called SPG = System Program Generator. At run time an SPG program could compile more program for itself. It could define and use macros. Its variables were in <angle brackets> and it had a text parser, giving SPG program text a resemblance to Backus–Naur form.
From the outset, Atlas was conceived as a supercomputer that would include a comprehensive operating system. The hardware included specific features that facilitated the work of the operating system. For example, the extracode routines and the interrupt routines each had dedicated storage, registers and program counters; a context switch from user mode to extracode mode or executive mode, or from extracode mode to executive mode, was therefore very fast.
- Howarth completed his Ph.D. in physics at age 22.
- Lavington 1975, p. 34
- Lavington 1998, pp. 44–45
- "COMPUTERS AND CENTERS, OVERSEAS: 2. Ferranti Ltd., Atlas 2 Computer, London Wl, England". Digital Computer Newsletter. 16 (1): 13–15. 1964.
- Lavington 1998, p. 43
- Lavington 1998, p. 44
- Lavington 1975, pp. 30–31.
- Lavington 1975, p. 30.
- Lavington 1975, p. 31.
- The Atlas, University of Manchester, archived from the original on 28 July 2012, retrieved 21 September 2010
- Lavington 1975, p. 32.
- Lavington 1975, p. 33.
- Lavington 1975, p. 34.
- Lavington 1975, p. 35.
- Lavington 1975, p. 36.
- Lavington 1975, p. 37.
- Lavington 1975, p. 38.
- Lavington 1975, p. 39.
- Cronin, D.E. (31 January 1965). I.C.T. Atlas 1 Computer Programming Manual for Atlas Basic Language (ABL) (PDF). London: International Computers and Tabulators Limited. p. 12.1/1.
- Lavington 1980, pp. 50–52
- Edwards, Dai (Summer 2013), "Designing and Building Atlas", Resurrection: The Bulletin of the Computer Conservation Society, 62: 9–18, ISSN 0958-7403
- Lavington, Simon (1980), Early British Computers, Manchester University Press, ISBN 0-7190-0803-4
- Lavington, Simon (1975), A History of Manchester Computers, Swindon: The British Computer Society, ISBN 978-1-902505-01-5
- Lavington, Simon (1998), A History of Manchester Computers (2 ed.), Swindon: The British Computer Society, ISBN 978-1-902505-01-5
- Parallel addition in digital computers: A new fast 'carry' circuit, T. Kilburn, D.B.G. Edwards, D. Aspinall, Proc. IEE Part B September 1959
- The Central Control Unit of the "Atlas" Computer, F. H. Sumner, G. Haley, E. C. Y. Chen, Information Processing 1962, Proc. IFIP Congress '62
- One-Level Storage System, T. Kilburn, D. B. G. Edwards, M. J. Lanigan, F. H. Sumner, IRE Trans. Electronic Computers April 1962 Accessed 2011-10-13
- Kilburn, T. (1 March 1961). "The Manchester University Atlas Operating System Part I: Internal Organization". The Computer Journal. 4 (3): 222–225. doi:10.1093/comjnl/4.3.222. ISSN 0010-4620.
- Howarth, D. J. (1 March 1961). "The Manchester University Atlas Operating System Part II: Users' Description". The Computer Journal. 4 (3): 226–229. doi:10.1093/comjnl/4.3.226. ISSN 0010-4620.
- The Atlas Supervisor, T. Kilburn, R .B. Payne, D .J. Howarth, reprinted from Computers—Key to Total Systems Control, Macmillan 1962
- The Atlas Scheduling System, D. J. Howarth, P. D. Jones, M. T. Wyld, Comp. J. October 1962
- The First Computers: History and Architectures, edited by Raúl Rojas and Ulf Hashagen, 2000, MIT Press, ISBN 0-262-18197-5
- A History of Computing Technology, M. R. Williams, IEEE Computer Society Press, 1997, ISBN 0-8186-7739-2