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BSIM (Berkeley Short-channel IGFET Model)[1] refers to a family of MOSFET transistor models for integrated circuit design. It also refers to the BSIM group located in the Department of Electrical Engineering and Computer Sciences (EECS) at the University of California, Berkeley, that develops these models. Accurate transistor models are needed for electronic circuit simulation, which in turn is needed for integrated circuit design. As the devices become smaller each process generation (see Moore's law), new models are needed to accurately reflect the transistor's behavior.

Commercial and industrial analog simulators (such as SPICE) have added many other device models as technology advanced and earlier models became inaccurate. To attempt standardization of these models so that a set of model parameters may be used in different simulators, an industry working group was formed, the Compact Model Coalition,[2] to choose, maintain and promote the use of standard models. BSIM models, developed at UC Berkeley are one of these standards. They include BSIM3,[3] BSIM4,[4] BSIM-BULK,[5] BSIM-SOI,[6] BSIM-CMG,[7] and BSIM-IMG.[8]

Other models supported by the council are PSP, HICUM, and MEXTRAM.


  1. ^ Sheu, Scharfetter & Ko, Jeng (August 1987). "BSIM: Berkeley Short-Channel IGFET Model for MOS Transistors". IEEE Journal of Solid State Circuits. SC-22: 558&ndash, 566.
  2. ^ "Compact Model Coalition (CMC)".
  3. ^ "BSIM3 Model". BSIM Group, UC Berkeley.
  4. ^ "BSIM4 Model". BSIM Group, UC Berkeley.
  5. ^ "BSIM-BULK Model". BSIM Group, UC Berkeley.
  6. ^ "BSIM-SOI Model". BSIM Group, UC Berkeley.
  7. ^ "BSIM-CMG Model". BSIM Group, UC Berkeley.
  8. ^ "BSIM-IMG Model". BSIM Group, UC Berkeley.

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